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SH7052 Datasheet(PDF) 260 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 260 Page - Renesas Technology Corp |
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260 / 919 page ![]() 234 • Bit 1—Input Capture Flag 0B (ICF0B): Status flag that indicates ICR0B input capture. Bit 1: ICF0B Description 0 [Clearing condition] (Initial value) When ICF0B is read while set to 1, then 0 is written to ICF0B 1 [Setting condition] When the TCNT0 value is transferred to the input capture register by an input capture signal • Bit 0—Input Capture Flag 0A (ICF0A): Status flag that indicates ICR0A input capture. Bit 0: ICF0A Description 0 [Clearing condition] (Initial value) When ICF0A is read while set to 1, then 0 is written to ICF0A 1 [Setting condition] When the TCNT0 value is transferred to the input capture register by an input capture signal Timer Status Registers 1A and 1B (TSR1A, TSR1B) TSR1A: TSR1A indicates the status of channel 1 input capture, compare-match, and overflow. Bit: 15 14 13 12 11 10 9 8 —— —— ——— OVF1A Initial value: 0 0 0 0 0 0 0 0 R/W: R R R R R R R R/(W)* Bit: 7 6 5 4 3 2 1 0 IMF1H IMF1G IMF1F IMF1E IMF1D IMF1C IMF1B IMF1A Initial value: 0 0 0 0 0 0 0 0 R/W: R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* Note: * Only 0 can be written, to clear the flag. • Bits 15 to 9—Reserved: These bits always read 0. The write value should always be 0. |
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