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SH7052 Datasheet(PDF) 258 Page - Renesas Technology Corp

Part # SH7052
Description  SuperHTM RISC engine
PDF  919 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7052 Datasheet(HTML) 258 Page - Renesas Technology Corp

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232
Timer Status Register 0 (TSR0)
TSR0 indicates the status of channel 0 interval interrupts, input capture, and overflow.
Bit:
15
14
13
12
11
10
9
8
——
——
———
—
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
IIF2B
IIF2A
IIF1
OVF0
ICF0D
ICF0C
ICF0B
ICF0A
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
Note: * Only 0 can be written, to clear the flag.
• Bits 15 to 8—Reserved: These bits always read 0. The write value should always be 0.
• Bit 7—Interval Interrupt Flag 2B (IIF2B): Status flag that indicates the generation of an
interval interrupt.
Bit 7: IIF2B
Description
0
[Clearing condition]
(Initial value)
When IIF2B is read while set to 1, then 0 is written to IIF2B
1
[Setting condition]
When interval interrupt selected by ITVRR2B is generated
• Bit 6—Interval Interrupt Flag 2A (IIF2A): Status flag that indicates the generation of an
interval interrupt.
Bit 6: IIF2A
Description
0
[Clearing condition]
(Initial value)
When IIF2A is read while set to 1, then 0 is written to IIF2A
1
[Setting condition]
When interval interrupt selected by ITVRR2A is generated



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