SH7052 datasheet(259/919 Pages) RENESAS

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• Bit 5—Interval Interrupt Flag 1 (IIF1): Status flag that indicates the generation of an interval

interrupt.

Bit 5: IIF1

Description

[Clearing condition]

(Initial value)

When IIF1 is read while set to 1, then 0 is written to IIF1

[Setting condition]

When interval interrupt selected by ITVRR1 is generated

• Bit 4—Overflow Flag 0 (OVF0): Status flag that indicates TCNT0 overflow.

Bit 4: OVF0

Description

[Clearing condition]

(Initial value)

When OVF0 is read while set to 1, then 0 is written to OVF0

[Setting condition]

When the TCNT0 value overflows (from H'FFFFFFFF to H'00000000)

• Bit 3—Input Capture Flag 0D (ICF0D): Status flag that indicates ICR0D input capture.

Bit 3: ICF0D

Description

[Clearing condition]

(Initial value)

When ICF0D is read while set to 1, then 0 is written to ICF0D

[Setting condition]

When the TCNT0 value is transferred to the input capture register by an input

capture signal. Also set by input capture with a channel 10 compare match as

the trigger

• Bit 2—Input Capture Flag 0C (ICF0C): Status flag that indicates ICR0C input capture.

Bit 2: ICF0C

Description

[Clearing condition]

(Initial value)

When ICF0C is read while set to 1, then 0 is written to ICF0C

[Setting condition]

When the TCNT0 value is transferred to the input capture register by an input

capture signal

SH7052 Datasheet(PDF) 259 Page - Renesas Technology Corp