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SH7052 Datasheet(PDF) 263 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 263 Page - Renesas Technology Corp |
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263 / 919 page ![]() 237 • Bit 2—Input Capture/Compare-Match Flag 1C (IMF1C): Status flag that indicates GR1C input capture or compare-match. Bit 2: IMF1C Description 0 [Clearing condition] (Initial value) When IMF1C is read while set to 1, then 0 is written to IMF1C 1 [Setting conditions] •••• When the TCNT1A value is transferred to GR1C by an input capture signal while GR1C is functioning as an input capture register •••• When TCNT1A = GR1C while GR1C is functioning as an output compare register • Bit 1—Input Capture/Compare-Match Flag 1B (IMF1B): Status flag that indicates GR1B input capture or compare-match. Bit 1: IMF1B Description 0 [Clearing condition] (Initial value) When IMF1B is read while set to 1, then 0 is written to IMF1B 1 [Setting conditions] • When the TCNT1A value is transferred to GR1B by an input capture signal while GR1B is functioning as an input capture register •••• When TCNT1A = GR1B while GR1B is functioning as an output compare register • Bit 0—Input Capture/Compare-Match Flag 1A (IMF1A): Status flag that indicates GR1A input capture or compare-match. Bit 0: IMF1A Description 0 [Clearing condition] (Initial value) When IMF1A is read while set to 1, then 0 is written to IMF1A 1 [Setting conditions] • When the TCNT1A value is transferred to GR1A by an input capture signal while GR1A is functioning as an input capture register •••• When TCNT1A = GR1A while GR1A is functioning as an output compare register |
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