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SH7052 Datasheet(PDF) 285 Page - Renesas Technology Corp

Part # SH7052
Description  SuperHTM RISC engine
PDF  919 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7052 Datasheet(HTML) 285 Page - Renesas Technology Corp

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259
Timer Status Register 11 (TSR11)
TSR11 indicates the status of channel 11 compare-match and overflow.
Bit:
15
14
13
12
11
10
9
8
——
——
———
OVF11
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R/(W)*
Bit:
7
6
5
4
3
2
1
0
——
——
——
IMF11B IMF11A
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R/(W)*
R/(W)*
Note: * Only 0 can be written, to clear the flag.
• Bits 15 to 9—Reserved: These bits always read 0. The write value should always be 0.
• Bit 8—Overflow Flag 11 (OVF11): Status flag that indicates TCNT11 overflow.
Bit 8: OVF11
Description
0
[Clearing condition]
(Initial value)
When OVF11 is read while set to 1, then 0 is written to OVF11
1
[Setting condition]
When the TCNT11 value overflows (from H'FFFF to H'0000)
• Bits 7 to 2—Reserved: These bits always read 0. The write value should always be 0.
• Bit 1—Compare-Match Flag 11B (IMF11B): Status flag that indicates GR11B compare-match.
Bit 1: IMF11B
Description
0
[Clearing condition]
(Initial value)
When IMF11B is read while set to 1, then 0 is written to IMF11B
1
[Setting condition]
When TCNT11 = GR11B while GR11B is functioning as an output compare
register



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