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SH7052 Datasheet(PDF) 296 Page - Renesas Technology Corp

Part # SH7052
Description  SuperHTM RISC engine
PDF  919 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7052 Datasheet(HTML) 296 Page - Renesas Technology Corp

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270
• Bit 1—Compare-Match Interrupt Enable 2B (CME2BB): Enables or disables interrupt requests
by CMF2B in TSR2B when CMF2B is set to 1.
Bit 1: CME2B
Description
0
CMI2B interrupt requested by CMF2B is disabled
(Initial value)
1
CMI2B interrupt requested by CMF2B is enabled
• Bit 0—Compare-Match Interrupt Enable 2A (CME2A): Enables or disables interrupt requests
by CMF2A in TSR2B when CMF2A is set to 1.
Bit 0: CME2A
Description
0
CMI2A interrupt requested by CMF2A is disabled
(Initial value)
1
CMI2A interrupt requested by CMF2A is enabled
Timer Interrupt Enable Register 3 (TIER3)
TIER3 controls enabling/disabling of channel 3 to 5 input capture, compare-match, and overflow
interrupt requests.
Bit:
15
14
13
12
11
10
9
8
—
OVE5
IME5D
IME5C
IME5B
IME5A
OVE4
IME4D
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
7
6
5
4
3
2
1
0
IME4C
IME4B
IME4A
OVE3
IME3D
IME3C
IME3B
IME3A
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
• Bit 15—Reserved: This bit always reads 0. The write value should always be 0.
• Bit 14—Overflow Interrupt Enable 5 (OVE5): Enables or disables interrupt requests by OVF5
in TSR3 when OVF5 is set to 1.
Bit 14: OVE5
Description
0
OVI5 interrupt requested by OVF5 is disabled
(Initial value)
1
OVI5 interrupt requested by OVF5 is enabled



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