SH7243 datasheet(509/1726 Pages) RENESAS

Part #	SH7243

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

PDF	1726 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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509 / 1726 page

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 1.00 Jun. 26, 2008 Page 479 of 1692

REJ09B0393-0100

Bit

Bit Name

Initial

Value

R/W

Description

TGFA

R/(W)*

Input Capture/Output Compare Flag A

Status flag that indicates the occurrence of TGRA input

capture or compare match. Only 0 can be written, for

flag clearing.

[Clearing conditions]

• When DMAC is activated by TGIA interrupt.

• When DTC is activated by TGIA interrupt, and the

DISEL bit of MRB in DTC is cleared to 0.

• When 0 is written to TGFA after reading

TGFA = 1*

[Setting conditions]

• When TCNT = TGRA and TGRA is functioning as

output compare register

• When TCNT value is transferred to TGRA by input

capture signal and TGRA is functioning as input

capture register

Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.

2. After reading 1, when the next flag set is generated before writing 0, the flag will not be

cleared by writing 0. Read 1 again and write 0 in this case.

SH7243 Datasheet(PDF) 509 Page - Renesas Technology Corp