SH7243 datasheet(138/1726 Pages) RENESAS

138 / 1726 page

Section 5 Exception Handling

Rev. 1.00 Jun. 26, 2008 Page 108 of 1692

REJ09B0393-0100

5.5

Interrupts

5.5.1

Interrupt Sources

Table 5.7 shows the sources that start up interrupt exception handling. These are divided into

NMI, user breaks, H-UDI, IRQ, and on-chip peripheral modules.

Table 5.7

Interrupt Sources

Type

Request Source

Number of

Sources

NMI

NMI pin (external input)

User break

User break controller (UBC)

H-UDI

User debugging interface (H-UDI)

IRQ

IRQ0 to IRQ7 pins (external input)

A/D converter (ADC)

Controller area network (RCAN-ET)

Direct memory access controller (DMAC)

Compare match timer (CMT)

Bus state controller (BSC)

Watchdog timer (WDT)

USB function module (USB)

Multi-function timer pulse unit 2 (MTU2)

Multi-function timer pulse unit 2S (MTU2S)

Port output enable 2 (POE2)

2C bus interface 3 (IIC3)

Synchronous serial communication unit (SSU)

Serial communication interface (SCI)

On-chip peripheral module

Serial communication interface with FIFO (SCIF)

Each interrupt source is allocated a different vector number and vector table offset. See table 6.4

in section 6, Interrupt Controller (INTC), for more information on vector numbers and vector table

address offsets.

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