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3825 Datasheet(PDF) 15 Page - Renesas Technology Corp |
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3825 Datasheet(HTML) 15 Page - Renesas Technology Corp |
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15 / 339 page ![]() 3825 GROUP USER’S MANUAL List of tables i List of tables CHAPTER 1. HARDWARE Table 1 Pin description (1) ................................................................................................................. 1-5 Table 2 Pin description (2) ................................................................................................................. 1-6 Table 3 List of supported products (1) ............................................................................................... 1-8 Table 4 List of supported products (2) ............................................................................................... 1-9 Table 5 I/O ports functions .............................................................................................................. 1-14 Table 6 Interrupt vector addresses and priority ............................................................................... 1-17 Table 7 Maximum number of display pixels at each duty ratio ........................................................ 1-29 Table 8 Bias control and applied voltage to VL1–VL3 ........................................................................................ 1-31 Table 9 Duty ratio control and common pins used .......................................................................... 1-31 Table 10 Programming adapter ....................................................................................................... 1-42 Table 11 Absolute maximum ratings ............................................................................................... 1-43 Table 12 Recommended operating conditions (1) ........................................................................... 1-43 Table 13 Recommended operating conditions (2) ........................................................................... 1-44 Table 14 Electrical characteristics (1) .............................................................................................. 1-45 Table 15 Electrical characteristics (2) .............................................................................................. 1-46 Table 16 A-D converter characteristics ........................................................................................... 1-46 Table 17 Timing requirements 1 ...................................................................................................... 1-47 Table 18 Timing requirements 2 ...................................................................................................... 1-47 Table 19 Switching characteristics 1 ............................................................................................... 1-48 Table 20 Switching characteristics 2 ............................................................................................... 1-48 Table 21 Absolute maximum ratings (Extended operating temperature version) ............................ 1-49 Table 22 Recommended operating conditions (Extended operating temperature version) (1) ....... 1-49 Table 23 Recommended operating conditions (Extended operating temperature version) (2) ....... 1-50 Table 24 Electrical characteristics (Extended operating temperature version) (1) .......................... 1-51 Table 25 Electrical characteristics (Extended operating temperature version) (2) .......................... 1-52 Table 26 A-D converter characteristics (Extended operating temperature version) ........................ 1-52 Table 27 Timing requirements 1 (Extended operating temperature version) .................................. 1-53 Table 28 Timing requirements 2 (Extended operating temperature version) .................................. 1-53 Table 29 Switching characteristics 1 (Extended operating temperature version) ............................ 1-54 Table 30 Switching characteristics 2 (Extended operating temperature version) ............................ 1-54 CHAPTER 2. APPLICATION Table 2.1.1 Memory allocation of port registers ................................................................................ 2-3 Table 2.1.2 Memory allocation of port direction registers .................................................................. 2-4 Table 2.1.3 I/O ports which either pull-up or pull-down is controlled by software .............................. 2-5 Table 2.1.4 Termination of unused pins .......................................................................................... 2-14 Table 2.2.1 Interrupt sources and interrupt request generating conditions ..................................... 2-16 Table 2.2.2 List of interrupt bits for individual interrupt sources ...................................................... 2-20 Table 2.3.1 Real time ports and bits for storing data ....................................................................... 2-40 Table 2.3.2 Relation between timer X operating mode bits and operating modes .......................... 2-57 Table 2.3.3 Relation between timer Y operating mode bits and operating modes .......................... 2-60 Table 2.3.4 Table example for timer X setting value ....................................................................... 2-80 Table 2.3.5 Table example for RTP setting value ........................................................................... 2-80 Table 2.4.1 Relation between timer 2 count source selection bit and count sources ...................... 2-93 Table 2.4.2 Relation between timer 3 count source selection bit and count sources ...................... 2-93 Table 2.4.3 Relation between timer 1 count source selection bit and count sources ...................... 2-93 Table 2.5.1 Baud rate selection table (reference values) .............................................................. 2-112 Table 2.5.2 Each bit function of UART transmit data .................................................................... 2-113 Table 2.5.3 Control contents of transmit enable bit ....................................................................... 2-124 Table 2.5.4 Control contents of receive enable bit ........................................................................ 2-125 |
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