7733 datasheet(384/940 Pages) RENESAS

384 / 940 page

ELECTRICAL CHARACTERISTICS

7733 Group User’s Manual

15–5

Max.

2.6

100

Limits

Vcc = 5 V,

f(XIN) = 25 MHz (Square waveform),

(f(f2) = 12.5 MHz),

f(XCIN) = 32.768 kHz,

in operating (Note 1)

Vcc = 5V,

f(XIN) = 25 MHz (Square waveform),

(f(f2) = 1.5625 MHz),

f(XCIN) : Stopped,

in operating (Note 1)

Vcc = 5V,

f(XIN) = 25 MHz (Square waveform),

f(XCIN) = 32.768 kHz,

when the WIT instruction is executed (Note 2)

Vcc = 5 V,

f(XIN) : Stopped,

f(XCIN) : 32.768 kHz,

in operating (Note 3)

Vcc = 5 V,

f(XIN) : Stopped,

f(XCIN) : 32.768 kHz,

when the WIT instruction is executed (Note 4)

Ta = 25 °C,

when clock is stopped

Ta = 85 °C,

when clock is stopped

15.3 Electrical characteristics 15.4 A-D converter characteristics

ELECTRICAL CHARACTERISTICS (Vcc= 5 V, Vss = 0 V, Ta = –20 to 85 °C, unless otherwise noted)

Unit

Measuring conditions

Symbol

Parameter

ICC

Power source

current

Min.

Typ.

9.5

1.3

µA

In single-chip

mode, output

pins are open,

and the other

pins are con-

nected to Vss.

Notes 1: This is applied when the main clock external input selection bit = “1,” the main clock division

selection bit = “0,” and the signal output disable selection bit = “1.”

2: This is applied when the main clock external input selection bit = “1” and the system clock stop

selection bit at wait state = “1.”

3: This is applied when the CPU and the clock timer are operating with the sub clock (32.768 kHz)

selected as the system clock.

4: This is applied when the XCOUT drivability selection bit = “0” and the system clock stop bit at wait

state = “1.”

15.4 A-D converter characteristics

A-D CONVERTER CHARACTERISTICS (Vcc = AVcc = 5 V, Vss = AVss = 0 V, Ta = –20 to 85 °C, f(XIN) = 25 MHz (Note), unless otherwise noted)

Limits

Min.

Typ. Max.

—

Resolution

VREF = Vcc

Bits

—

Absolute accuracy

VREF = Vcc

± 3

LSB

RLADDER Ladder resistance

VREF = Vcc

tCONV

Conversion time

9.44

µs

VREF

Reference voltage

Vcc

VIA

Analog input voltage

VREF

Symbol

Parameter

Measuring conditions

Unit

Note: This is applied when the main clock division selection bit = “0” and f(f2) = 12.5 MHz.

7733 Datasheet(PDF) 384 Page - Renesas Technology Corp

7733 Datasheet(HTML) 384 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL