7733 datasheet(430/940 Pages) RENESAS

430 / 940 page

APPLICATIONS

7733 Group User’s Manual

17–23

(3) ROM and SRAM expansion example on maximum model

Figure 17.1.17 shows an expansion example for ROM and SRAM on the maximum model (with two

32-Kbyte ROMs and two 32-Kbyte SRAMs, microprocessor mode). Figure 17.1.18 shows the corre-

sponding timing diagram.

17.1 Memory expansion

Fig. 17.1.17 Expansion example for ROM and SRAM on maximum model

000016

008016

External ROM

area

(M5M27C256AK!2)

SFR area

Internal RAM

area

External RAM

area

(M5M5256CP!2)

Memory map

1FFFF16

1000016

088016

AC32

AC04

20 MHz

XIN

XOUT

M37733S4BFP

BYTE

A16

A8 to A15

Data bus (even)

Data bus (odd)

AC573

AC32

AC04

to D7

to D15

Address bus

A0 to A14

D0 to D7

M5M27C256AK-15

to A15

D0 to D7

A0 to A14

to A15

A0 to A14

DQ1 to DQ8

to A15

to D7

M5M5256CP-70LL

to D15

A1 to A7

A8/D8 to

A15/D15

ALE

A16/D0

D1 to D7

R/W

BHE

CNVSS

AC573

Circuit conditions: Wait 1 is valid,

f(XIN)

f(XCIN)

g1, g2 Make sure that the following relationship is satisfied:

q The sum of propagation delay time of g1 and that of

g2 is 90 ns or less.

g2 Make sure that the propagation delay time is 10 ns or less.

g3 Make sure that the propagation delay time is 15 ns or less.

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