7733 datasheet(521/940 Pages) RENESAS

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EXTERNAL ROM VERSION

7733 Group User’s Manual

20–5

20.3 Pin description

Tables 20.3.1 and 20.3.2 list the pin description.

Table 20.3.1 Pin description (1)

Vcc, Vss

CNVss

______

RESET

XIN

XOUT

BYTE

AVcc

AVss

VREF

A0 (P00)–

A7 (P07)

A8/D8

(P10)–A15/

D15 (P17)

A16/D0

(P20)–A23/

D7 (P27)

Input/Output

Input

Output

Input

Output

I/O

Functions

To pin Vcc, apply 5 V±10% (When the main clock is

the system clock) or 2.7 V to 5.5 V (When the sub-

clock is the system clock). To pin Vss, apply 0 V.

Connect to pin Vcc.

The microcomputer is reset when “L” level is input to

this pin.

Pins XIN and XOUT are the I/O pins of the clock

generating circuit, respectively. Connect these pins via

a ceramic resonator or a quartz-crystal oscillator. When

an external clock is used, the clock should be input to

pin XIN, and pin XOUT should be left open.

This pin outputs signal E. When E’s level is “L,” the

microcomputer reads data and instruction codes or writes

data. Also, output of signal E can be stopped by software.

Input level to this pin determines whether the external

data bus has a 16-bit width or an 8-bit width. A 16-bit

width is selected when the level is “L,” and an 8-bit

width is selected when the level is “H.”

Power source input for the A-D converter. Connect to

pin Vcc.

Power source input for the A-D converter. Connect to

pin Vss.

This is the reference voltage input pin for the A-D

converter.

Address’s low-order 8 bits (A0–A7) are output.

q When the external data bus width = 8 bits

(Pin BYTE is at “H” level)

Address’s middle-order 8 bits (A8–A15) are output.

q When the external bus width = 16 bits

(Pin BYTE is at “L” level)

Input/Output of data (D8–D15) and output of address’s

middle-order 8 bits (A8–A15) are performed with the

time sharing method.

Input/Output of data (D0–D7) and output of address’s

high-order 8 bits (A16–A23) are performed with the time

sharing method.

Name

Power source input

CNVss

Reset input

Clock input

Clock output

Enable output

External data bus width

selection input

Analog power source input

Reference voltage input

Address (low order) output

Address (middle order)

output/Data (high order)

I/O

Address (high order) output/

Data (low-order) I/O

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