7733 datasheet(522/940 Pages) RENESAS

522 / 940 page

EXTERNAL ROM VERSION

7733 Group User’s Manual

20–6

20.3 Pin description

Table 20.3.2 Pin description (2)

Input/Output

Output

Input

Output

I/O

Functions

____

These pins respectively output signals R/W, BHE, ALE,

_____

and HLDA.

q Signal R/W

This signal indicates the data bus state.

When this signal level is “H,” a data bus is in the

read state. When this signal level is “L,” a data bus

is in the write state.

____

q Signal BHE

This signal’s level is “L” when the microcomputer

accesses an odd address.

q Signal ALE

This signal is used to separate the multiplexed signal which

consists of an address and data to the address and the data.

_____

q Signal HLDA

This signal informs the external whether the

microcomputer enters the Hold state or not.

_____

In Hold state, pin HLDA outputs “L” level.

_____

The microcomputer is in Hold state while pin HOLD’s

____

input level is “L” and is in Ready state while pin RDY’s

input level is “L.”

Clock

φ1 is output from pin φ1. P43–P47 function as I/

O ports with the same functions as port P5.

P5 is a CMOS 8-bit I/O port and has an I/O direction

or an output port. And it can be programmed as I/O

pins for timers A0–A3 and input pins (KI0–KI3) for the

key input interrupt.

P6 is an 8-bit I/O port with the same function as port

P5 and can be programmed as I/O pins for timer A4,

external interrupt input pins, and input pins for timers

B0–B2. P67 also functions as an output pin for the sub

clock (

φSUB).

P7 is an 8-bit I/O port with the same function as port

P5 and can be programmed as analog input pins for

the A-D converter. P76 and P77 can be programmed

as I/O pins (XCOUT, XCIN) for the sub-clock (32 kHz)

oscillation circuit. When using P76 and P77 as pins

XCOUT and XCIN, connect a quartz-crystal oscillator

between them. P72–P75 also function as UART2’s I/O

pins.

P8 is an 8-bit I/O port with the same function as port

P5 and can be programmed as serial I/O’s I/O pins.

Name

Read write output,

Byte high enable output,

Address latch enable

output,

Hold acknowledge output

Hold request,

Ready,

Clock output,

I/O port P4

I/O port P5

I/O port P6

I/O port P7

I/O port P8

R/W (P30),

____

BHE

(P31),

ALE (P32),

_____

HLDA

(P33)

_____

HOLD

____

RDY

φ1(P42),

P43–P47

P50–P57

P60–P67

P70–P77

P80–P87

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