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7733 Datasheet(PDF) 667 Page - Renesas Technology Corp

Part # 7733
Description  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  940 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7733 Datasheet(HTML) 667 Page - Renesas Technology Corp

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WATCHDOG TIMER
7735 Group User’s Manual
10-3
Fig. 10.2.2 Structure of oscillation circuit control register 1
Fig. 10.2.3 Procedure for writing data to oscillation circuit control register 1
10.2 Operation description
In the M37735MHBXXXFP, set bit 3 of the oscillation circuit control register 1 to “0.”
Write data “010101012.” (LDM instruction)
• When writing to bits 0 to 3
Write data “00000XXX2.” (LDM instruction)
Next instruction
(b3 in Figure 10.2.2)
(b2 to b0 in Figure 10.2.2)
2: Because this bit is “1” at reset, clear this bit to “0” with the initial setting program after
reset.
3: The case where data “010101012” is written with the procedure shown below is not
included.
4: For the 7733 Group, refer to Figure 14.3.3 in part 1.
5:
represents that bits 3 to 7 are not used for the watchdog timer.
Bit
Bit name
Functions
At reset
RW
0
1
2
3
4
5
6
7
Main clock division selection bit
Sub clock external input selection bit
Must be fixed to “0” in the one time PROM and EPROM versions (Notes 1 and 2).
Must be fixed to “0” (Note 3).
Clock prescaler reset bit
0
0
0
0
Undefined
0
0
Oscillation circuit control register 1 (address 6F16)
0: Sub-clock oscillation circuit is operating
by itself. Pin P76 functions as pin XCOUT.
Watchdog timer is used when
terminating stop mode.
1: Sub clock is input from the external.
Pin P76 functions as a programmable
I/O port. Watchdog timer is not used when
terminating stop mode.
RW
RW
RW
RW
WO
—
—
Not implemented.
Not implemented.
b1
b0
b2
b3
b4
b5
b6
b7
Notes 1: When writing to this register, follow the procedure shown below.
By writing “1” to this bit, clock prescaler is
initialized.
RW
1
(Note 4)
0
Undefined
Main clock external input selection bit
0: Main clock is divided by 2.
1: Main clock is not divided by 2.
0: Main-clock oscillation circuit is operating by
itself. Watchdog timer is used when
terminating stop mode.
1: Main clock is input from the external.
Watchdog timer is not used when
terminating stop mode.
Must be fixed to “0” in the mask ROM and external ROM versions (Note 1).
(Note 1)
(Note 1)
(Note 1)
0



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