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7733 Datasheet(PDF) 849 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 849 Page - Renesas Technology Corp |
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849 / 940 page ![]() SERIAL I/O 7736 Group User’s Manual 8–3 8.2.9 Port P8 direction register I/O pins of UARTi are multiplexed with ports P8 and P9. When using pins P82 and P86 as serial data input pins (RxDi), set the corresponding bits of the port P8 direction register to “0” to set this port for the input _________ _________ mode. When using pins P80, P81, P83–P85 and P87 as UARTi’s I/O pins (CTSi/RTSi, CLKi, TxDi), these pins are forcibly set as the UARTi’s I/O pins, regardless of the port P8 direction register’s contents. Also, as for CLKS0 and CLKS1, refer to section “8.3.1 (4) Number of transfer clock output pins (UART0)” in part 1. Figure 8.2.16 shows the relationship between the port P8 direction register and UARTi’s I/O pins. When using UART2, pins P90–P93 are forcibly set as the UART2’s input or output pins. Note that the functions of the UARTi’s I/O pins can be switched by software. For details, refer to the description of each operating mode. 8.2 Block description 0 1 2 3 4 5 6 7 Pin P80/CTS0/RTS0/CLKS1 Pin P82/RxD0/CLKS0 Pin P83/TxD0 Pin P84/CTS1/RTS1 Pin P86/RxD1 Pin P85/CLK1 Port P8 direction register (address 1416) b1 b0 b2 b3 b4 b5 b6 b7 Pin P81/CLK0 Pin P87/TxD1 RW 0 0 0 0 0 0 0 0 Corresponding pin name Functions Bit At reset 0: Input mode 1: Output mode When using pins P82 and P86 as serial data’s input pins (RxD0, RxD1), set the corresponding bits to “0.” RW RW RW RW RW RW RW RW Note: For pins CLKS0 and CLKS1, refer to section “8.3.1 (4) Number of transfer clock output pins (UART0)” in part 1. Fig. 8.2.16 Relationship between port P8 direction register and UARTi’s I/O pins |
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