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7733 Datasheet(PDF) 283 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 283 Page - Renesas Technology Corp |
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283 / 940 page ![]() A-D CONVERTER 7733 Group User’s Manual 9–18 A-D conversion is started. Trigger is generated. Falling edges input to pin ADTRG When external trigger is selected When internal trigger is selected Setting of the A-D conversion start flag to “1” b7 b0 A-D control register 0 (address 1E 16) A-D conversion start flag 1 Note: Writing to each bit (except bit 6) of the A-D control register 0 and each bit of the A-D control register 1 must be performed while A-D converter stops operating, in other words, before a trigger is generated. When the V REF connection selection bit is cleared from “1” to “0,” wait for an interval of 1 s or more passed, and then generate a trigger. Setting of the interrupt priority level b7 b0 A-D/UART2 trans./rece. interrupt control register (address 70 16) Interrupt priority level selection bits When using interrupts, one of levels 1 to 7 must be set. When disabling interrupts, level 0 must be set. Setting of the A-D control registers 0, 1 b7 b0 A-D control register 0 (address 1E 16) 00 0 0 0 0: AN0 is selected. 0 0 1: AN1 is selected. 0 1 0: AN2 is selected. 0 1 1: AN3 is selected. 1 0 0: AN4 is selected. 1 0 1: AN5 is selected. 1 1 0: AN6 is selected. 1 1 1: AN7 is selected. Trigger selection bit 0: Internal trigger 1: External trigger A-D conversion start flag 0: A-D conversion is stopped. Analog input selection bits b7 b0 A-D control register 1 (address 1F 16) 0 ! ! : It may be “0” or “1.” f2: Refer to chapter “14. CLOCK GENERATING CIRCUIT.” A-D conversion frequency ( AD ) selection flag 0: f 2/4 1: f2/2 VREF connection selection bit 0: Pin VREF is connected. Selection of the one-shot mode 0 Setting of the port P7 direction register b7 b0 Port P7 direction register (address 11 16) Set bits corresponding to selected analog input pins to “0.” When an external trigger is selected, set bit 7 to “0.” AN0 AN5 AN1 AN2 AN3 AN4 b2b1b0 8/10-bit mode selection bit 0: 8-bit resolution 1: 10-bit resolution AN7 AN6 9.5 One-shot mode Fig. 9.5.1 Initial setting example for registers related to one-shot mode ! |
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