7733 datasheet(286/940 Pages) RENESAS

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A-D CONVERTER

7733 Group User’s Manual

9–21

9.6 Repeat mode

Fig. 9.6.1 Initial setting example for registers related to repeat mode

A-D conversion is started.

Trigger is generated.

Falling edges input to Pin

ADTRG

When external trigger is selected

When internal trigger is selected

Setting of the A-D conversion start flag to “1”

A-D control register 0 (address 1E16)

A-D conversion start flag

Note: Writing to each bit (except bit 6) of the A-D control register 0

and each bit of the A-D control register 1 must be performed

while A-D converter stops operating, in other words, before

a trigger is generated.

When the VREF connection selection bit is cleared from “1” to “0,”

wait for an interval of 1 µs or more passed, and then

generate a trigger.

Setting of the port P7 direction register

Port P7 direction register (address 1116)

Set bits corresponding to selected

analog input pins to “0.”

When an external trigger is selected,

set bit 7 to “0.”

AN0

Setting of the A-D control registers 0, 1

A-D control register 0 (address 1E16)

0 0 0: AN0 is selected.

0 0 1: AN1 is selected.

0 1 0: AN2 is selected.

0 1 1: AN3 is selected.

1 0 0: AN4 is selected.

1 0 1: AN5 is selected.

1 1 0: AN6 is selected.

1 1 1: AN7 is selected.

b2b1b0

Trigger selection bit

0: Internal trigger

1: External trigger

A-D conversion start flag

0: A-D conversion is stopped.

Analog input selection bits

A-D control register 1 (address 1F16)

! : It may be “0” or “1.”

f2: Refer to chapter “14. CLOCK GENERATING

CIRCUIT.”

VREF connection selection bit

0: Pin VREF is connected.

A-D conversion frequency (

) selection flag

0: f2/4

1: f2/2

Selection of the repeat mode

AN5

AN1

AN2

AN3

AN4

8/10-bit mode selection bit

0: 8-bit resolution

1: 10-bit resolution

AN7

AN6

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