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ADF9010 Datasheet(PDF) 24 Page - Analog Devices |
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ADF9010 Datasheet(HTML) 24 Page - Analog Devices |
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24 / 28 page ![]() ADF9010 Rev. 0 | Page 24 of 28 LO AND Tx OUTPUT MATCHING The LO and Tx output stages are each connected to the collectors of an NPN differential pair driven by buffered outputs from the VCO or mixer outputs, respectively. The recommended matching for each of these circuits consists of a 7.5 nH shunt inductor to VDD, a 100 pF series capacitor, and in the case of the Tx output a 50:100 balun to combine the Tx outputs. The Anaren BD0810J50100A00 is ideally suited to this task. PCB DESIGN GUIDELINES The lands on the chip scale package (CP-48-1) are rectangular. The printed circuit board pad for these should be 0.1 mm longer than the package land length and 0.05 mm wider than the package land width. The land should be centered on the pad. This ensures that the solder joint size is maximized. The bottom of the chip scale package has a central thermal pad. The thermal pad on the printed circuit board should be at least as large as this exposed pad. On the printed circuit board, there should be a clearance of at least 0.25 mm between the thermal pad and the inner edges of the pad pattern. This ensures that shorting is avoided. Thermal vias can be used on the printed circuit board thermal pad to improve thermal performance of the package. If vias are used, they should be incorporated in the thermal pad at a 1.2 mm pitch grid. The via diameter should be between 0.3 mm and 0.33 mm, and the via barrel should be plated with 1 oz. copper to plug the via. The user should connect the printed circuit board thermal pad to AGND. |
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