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IRF7821 Datasheet(PDF) 19 Page - Texas Instruments

Part # IRF7821
Description  Dual-Synchronous, Step-Down Controller with Out-of-Audio??Operation and 100-mA LDOs for Notebook System Power
PDF  33 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

IRF7821 Datasheet(HTML) 19 Page - Texas Instruments

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Loop Compensation
ESR
R1
Co
+
2V
+
Lx
R2
Control
logic
&
Driver
RL
VIN
VFB
DRVH
DRVL
PWM
Switching Modulator
Voltage Divider
Io
Ic
I
L
Vc
Output Capacitor
fSW
0
O
1
f
2
ESR C
4
=
£
p ´
´
(1)
Ramp Signal
TPS51123
www.ti.com ........................................................................................................................................................................................... SLUS890 – DECEMBER 2008
From small-signal loop analysis, a buck converter using D-CAPTM mode can be simplified as below.
Figure 36. Simplifying the Modulator
The output voltage is compared with internal reference voltage after divider resistors, R1 and R2. The PWM
comparator determines the timing to turn on high-side MOSFET. The gain and speed of the comparator is high
enough to keep the voltage at the beginning of each on cycle substantially constant. For the loop stability, the
0dB frequency, f0, defined below need to be lower than 1/4 of the switching frequency.
As f0 is determined solely by the output capacitor's characteristics, loop stability of D-CAP
TM mode is determined
by the capacitor's chemistry. For example, specialty polymer capacitors (SP-CAP) have Co in the order of
several 100
µF and ESR in range of 10 mΩ. These make f
0 on the order of 100 kHz or less and the loop will be
stable. However, ceramic capacitors have f0 at more than 700 kHz, which is not suitable for this operational
mode.
The TPS51123 adds a ramp signal to the 2-V reference in order to improve its jitter performance. As described in
the previous section, the feedback voltage is compared with the reference information to keep the output voltage
in regulation. By adding a small ramp signal to the reference, the S/N ratio at the onset of a new switching cycle
is improved. Therefore the operation becomes less jitter and stable. The ramp signal is controlled to start with
-20mV at the beginning of ON-cycle and to become 0 mV at the end of OFF-cycle in steady state. By using this
scheme, the TPS51123 improve jitter performance without sacrificing the reference accuracy.
Copyright © 2008, Texas Instruments Incorporated
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