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TDA8950 Datasheet(PDF) 7 Page - NXP Semiconductors |
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TDA8950 Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 39 page ![]() TDA8950_1 © NXP B.V. 2008. All rights reserved. Preliminary data sheet Rev. 01 — 9 September 2008 7 of 39 NXP Semiconductors TDA8950 2 × 150 W class-D power amplifier In order to fully charge the coupling capacitors at the inputs, the amplifier will remain automatically in the Mute mode before switching to the Operating mode. A complete overview of the start-up timing is given in Figure 5. (1) First 1 ⁄ 4 pulse down. Upper diagram: When switching from standby to mute, there is a delay of approximately 100 ms before the output starts switching. The audio signal is available after VMODE has been set to operating, but not earlier than 150 ms after switching to mute. For pop noise-free start-up it is recommended that the time constant applied to pin MODE is at least 350 ms for the transition between mute and operating. Lower diagram: When switching directly from standby to operating, there is a first delay of 100 ms before the outputs starts switching. The audio signal is available after a second delay of 50 ms. For pop noise-free start-up it is recommended that the time constant applied to pin MODE is at least 500 ms for the transition between standby and operating. Fig 5. Timing on mode selection input 2.2 V < VMODE < 3 V audio output operating standby mute 50 % duty cycle > 4.2 V 0 V (SGND) time 001aah657 VMODE 100 ms 50 ms modulated PWM > 350 ms 2.2 V < VMODE < 3 V audio output operating standby mute 50 % duty cycle > 4.2 V 0 V (SGND) time VMODE 100 ms 50 ms modulated PWM > 350 ms (1) (1) |
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