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LT5504 Datasheet(PDF) 6 Page - Linear Technology |
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LT5504 Datasheet(HTML) 6 Page - Linear Technology |
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6 / 8 page ![]() LT5504 6 5504f 1: 63.56Ω –j98.05Ω 900.00MHz 2: 26.69Ω –j42.90Ω 1.90GHz 3: 28.88Ω –j27.76Ω 2.50GHz 1 2 3 START: 100MHz STOP:3GHz 5504 F01 APPLICATIO S I FOR ATIO Limiting Mixer and LPF The amplified RF signal is down-converted using the limiting mixer and LO signal. The resulting signal is filtered by the 3rd-order, 450MHz, integrated low pass filter (LPF). Only the desired IF signal is passed to the IF limiters for further detection. Any other mixing products, including LO feedthrough, are much reduced to maximize sensitivity. The receiver’s sensitivity is thus defined by the LPF band- width. IF Limiter The IF signal is then amplified through the multiple limiter stages for further signal detection. All DC offsets, includ- ing LO signal self-mixing, are eliminated by an internal DC offset cancellation circuit. Nevertheless, care should be taken in component placement and in PCB layout to minimize LO coupling to the RF port. Output Interface The output interface of the LT55O4 is shown in Figure 4. The output currents from the RF and IF detectors are summed and converted into an output voltage, VOUT. The maximum charging current available to the output load is about 400µA. An internal compensation capacitor CC is used to guarantee stable operation for a large capacitive output load. The slew rate is 80V/µs and the small signal output bandwidth is approximately 5MHz when the output is resistively terminated. When the output is loaded with a large capacitor CL, the slew rate is limited Figure 3 shows the output voltage vs RF input power response for these two input terminations. The voltage gain of the single-ended-to-differential conversion circuit is: GAIN LOG R dB IN == 20 50 3 •, where RIN = 100Ω is the narrow band input impedance. Thus, the output voltage curve in this case is shifted to the left by about 3dB. Table 1. The Component Values of Matching Network LSH, CS1 and CS2 fIF (MHz) LSH(nH) CS1/CS2(pF) 900 12.0 3.9 1900 3.3 3.3 2500 2.7 2.2 2700 2.4 1.5 MATCHING NETWORK RF INPUT CS1 3.3pF CS2 3.3pF LSH 3.3nH TO RF+ TO RF– 5504 F02 2.5 2.0 1.5 1.0 0.5 0 PIN (dBm) –80 –70 –60 –50 –40 –30 –20 –10 10 5504 F03 0 fRF = 1.9GHz WITH SINGLE-ENDED-TO- DIFFERENTIAL INPUT CIRCUIT WITH 1:1 INPUT TX Figure 3. The Output Voltage vs RF Input Power Figure 1. Differential RF Input Impedance Figure 2. RF Input Matching Network at 1900MHz |
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