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LTC2216/LTC2215

22165f

Figure 15. Descrambling a Scrambled Digital Output

•

D14

D15

PC BOARD

FPGA

CLKOUT

D15 D0

D14 D0

D2 D0

D1 D0

22165 F15

LTC2216/

LTC2215

Internal Dither

The LTC2216/LTC2215 is a 16-bit ADC with a very linear

transfer function; however, at low input levels even slight

imperfections in the transfer function will result in unwanted

tones. Small errors in the transfer function are usually a

result of ADC element mismatches. An optional internal

dither mode can be enabled to randomize the input location

on the ADC transfer curve, resulting in improved SFDR

for low signal levels.

As shown in Figure 16, the output of the sample-and-hold

ampliﬁer is summed with the output of a dither DAC. The

dither DAC is driven by a long sequence pseudo-random

number generator; the random number fed to the dither DAC

is also subtracted from the ADC result. If the dither DAC

is precisely calibrated to the ADC, very little of the dither

signal will be seen at the output. The dither signal that does

leak through will appear as white noise. The dither DAC is

calibrated to result in typically less than 0.5dB elevation

in the noise ﬂoor of the ADC, as compared to the noise

ﬂoor with dither off when a suitable input termination is

provided (see Demo Board schematic DC996B).

Figure 16. Functional Equivalent Block Diagram of Internal Dither Circuit

+–

AIN–

AIN+

S/H

AMP

DIGITAL

SUMMATION

OUTPUT

DRIVERS

MULTIBIT DEEP

PSEUDO-RANDOM

NUMBER

GENERATOR

16-BIT

PIPELINED

ADC CORE

PRECISION

DAC

CLOCK/DUTY

CYCLE

CONTROL

CLKOUT

D15

•

ENC

DITHER ENABLE

HIGH = DITHER ON

LOW = DITHER OFF

DITH

ENC

ANALOG

INPUT

22165 F16

LTC2216/LTC2215

APPLICATIONS INFORMATION

LTC2216 Datasheet(PDF) 29 Page - Linear Technology

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