THS1060

10-BIT 60 MSPS IF SAMPLING COMMUNICATIONS

ANALOG-TO-DIGITAL CONVERTER

SLAS212 – MARCH 2000

18

POST OFFICE BOX 655303

APPLICATION INFORMATION

digital outputs

each digital output of the THS1060 should drive only one digital input. The CMOS output drivers are capable

with the digital output can be used for optimizing SNR performance.

power supplies

to switched power supplies, must be used to minimize supply noise. It is also recommended to partition the

analog and digital components on the board in such a way that the analog supply plane does not overlap with

the digital supply plane in order to limit dielectric coupling between the different supplies.

using the TI PowerPAD

™

While it is not necessary to use the Texas Instruments PowerPAD

™ to meet the minimum and maximum specs

indicated in this spec sheet, proper use of the PowerPAD

™ will improve the performance of the THS1060

For high speed sampling applications (around 60 MSPS), significant performance enhancement above the

specified values can be achieved by properly applying the PowerPAD

™. This will maintain the junction

temperature of the device at significantly lower levels and render the device even more insensitive to duty cycle

variations on the clock, as shown in Figure 18.

The THS1060 package makes use of the Texas Instruments PowerPAD

™ which, when soldered to a thermal

land, creates a highly efficient path for heat energy and ground noise currents from the circuit die to the PCB

ground plane. The silicon die in a PowerPAD

™ package is bonded to a copper alloy plate with a thin layer of

thermally and electrically conductive epoxy. The copper alloy plate or PowerPAD

™ is exposed on the bottom

of the device package for a direct solder attachment to a PCB land or conductive pad. The land dimensions

should have minimum dimensions equal to the package dimensions minus 2 mm, see Figure 25.

For a multilayer circuit board, a second land having dimensions equal to or greater than the land to which the

device is soldered should be placed on the back of the circuit board (see Figure 26). A total of 9 thermal vias

or plated through-holes should be used to connect the two lands to a ground plane (buried or otherwise) having

a minimum total area of 3 inches square in 1 oz. copper. For the THS1060 package, the thermal via centers

should be spaced at a minimum of 1 mm. The ground plane need not be directly under or centered around the

device footprint if a wide ground plane thermal run having a width on the order of the device is used to channel

the heat from the vias to the larger portion of the ground plane. The THS1060 package has a standoff of 0.19

mm or 7.5 mils. In order to apply the proper amount of solder paste to the land. a solder paste stencil with a 6

mils thickness is recommended for this device. Too thin a stencil may lead to an inadequate connection to the

land. Too thick a stencil may lead to beading of solder in the vicinity of the pins which may lead to shorts. For

more information, refer to Texas Instruments literature number SLMA002

PowerPAD

™ Thermally Enhanced

Package.