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TMS320VC5421 Datasheet(PDF) 16 Page - Texas Instruments |
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TMS320VC5421 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 88 page  TMS320VC5421 DIGITAL SIGNAL PROCESSOR SPRS098 – DECEMBER 1999 16 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 functional overview GPIO MBus 32K RAM Dual Access Program/Data McBSP1 McBSP2 McBSP3 RHEA Bus APLL TIMER JTAG Clocks RHEAbus RHEA Bridge TI BUS xDMA logic 54X cLEAD (Core A) 16 HPI DSP Subsystem A GPIO McBSP1 McBSP2 MBus RHEA Bus 32K RAM Single Access Data 32K RAM Dual Access Program/Data RHEA Bridge McBSP3 TIMER MBus JTAG Host Access Bus xDMA Logic 54X cLEAD (Core B) 16 HPI DSP Subsystem B 2K Program ROM Core-to-Core FIFO Interface 2K Program ROM 32K RAM Single Access Data Arbitrator MBus MBus Arbitrator Interprocessor IRQs 16HPI XIO Arbitrator TI Bus P, C, D, E Buses and Control Signals P, C, D, E Buses and Control Signals 128K Dual Access PRAM Figure 1. Functional Block Diagram |
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