TMS370 datasheet(29/63 Pages) TI

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TMS370CxCx

8-BIT MICROCONTROLLER

SPNS040B – NOVEMBER 1995 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

serial communications interface 2 module (continued)

Bit 2

SLEEP (SCI sleep)

This bit controls the receive features of the multiprocessor communication modes. This bit must

be cleared to bring the SCI out of sleep mode.

0 = Disables sleep mode

1 = Enables sleep mode

Bit 3

TXWAKE (SCI transmitter wake-up)

The TXWAKE bit controls the transmit features of the multiprocessor communication modes. This

bit is cleared only by system reset. The SCI hardware clears this bit, once it has been transferred

to wake-up temporary (WUT).

Bit 4

CLOCK ENABLE (SCI internal clock enable)

This bit enables or disables the SCI internal clock. For SCI operation, this bit must be written as

a 1 when writing to the SCICTL register.

0 = Disables SCI internal clock (stops SCI operation)

1 = Enables SCI internal clock (SCI operates)

Bit 5

SCI SW RESET (SCI software reset — active low)

Writing a 0 to this bit initializes the SCI state machines and operation flags to the reset condition.

All affected logic is held in the reset state until a 1 is written to the SCI SW RESET bit. After a

system reset, you must re-enable the SCI by writing a 1 to this bit. This bit must be cleared after

a receiver break detect.

SCI SW RESET affects the operating flags of the SCI. This bit does not affect the configuration

bits, nor does it put in the reset values. The flags listed in Table 18 are set to the values shown

when SCI SW RESET is cleared. The operating flags are frozen until the SCI SW RESET bit is

set again.

Table 18. Flags Affected by SCI SW RESET

SCI FLAG

DESIGNATION

VALUE AFTER SCI SW RESET

TXRDY

TXCTL.7

TXEMPTY

TXCTL.6

RXWAKE

RXCTL.1

RXCTL.2

RXCTL.3

RXCTL.4

BRKDT

RXCTL.5

RXRDY

RXCTL.6

RX ERROR

RXCTL.7

Bits 6, 7

Reserved (read data is indeterminate)

baud-select registers (BAUD MSB and BAUD LSB)

The BAUD MSB and BAUD LSB registers store the data required to generate the bit rate. The SCI2 uses the com-

bined 16-bit value, BAUD REG, of the baud-select registers to set the internal SCI2 clock frequency.

D For asynchronous-mode communication, data is transmitted and received at the rate of one bit for each

16 internal SCICLK periods.

TMS370 Datasheet(PDF) 29 Page - Texas Instruments

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