TMS370 datasheet(6/77 Pages) TI

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TMS370Cx5x

8-BIT MICROCONTROLLER

SPNS010F – DECEMBER 1986 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

description (continued)

The suffix letter (A or B) appended to the device names shown in the device column of Table 2 indicates the

configuration of the device. ROM or an EPROM devices have different configurations as indicated in Table 3.

ROM devices with the suffix letter A are configured through a programmable contact during manufacture.

Table 3. Suffix Letter Configuration

DEVICE†

WATCHDOG TIMER

CLOCK

LOW-POWER MODE

EPROM A

Standard

Divide-by-4 (Standard oscillator)

Enabled

EPROM B

Hard

Divide-by-1 (PLL)

Enabled

Standard

ROM A

Hard

Divide-by-4 or Divide-by-1 (PLL)

Enabled or disabled

Simple

ROM-less A

Standard

Divide-by-4

Enabled

† Refer to the “device numbering conventions” section for device nomenclature and the “device part numbers” section for ordering.

Unless otherwise noted, the terms TMS370Cx50, TMS370Cx52, TMS370Cx53, TMS370Cx56, TMS370Cx58,

TMS370Cx59, and SE370C75x refer to the individual devices listed in Table 2 and described in this data sheet.

All TMS370Cx5x devices contain the following on-chip peripheral modules:

D Eight-channel, 8-bit analog-to-digital converter 1 (ADC1)

D Serial communications interface 1 (SCI1)

D Serial peripheral interface (SPI)

D One 24-bit general-purpose watchdog timer

D Two 16-bit general-purpose timers (one with an 8-bit prescaler)

TMS370C756, TMS370C758, and TMS370C759 are one-time programmable (OTP) devices that are available

in plastic packages. This microcomputer is effective to use for immediate production updates for other members

of the TMS370Cx5x family or for low-volume production runs when the mask charge or cycle time for low-cost

mask ROM devices is not practical.

The SE370C756, SE370C758, and SE370C759 have windowed ceramic packages to allow reprogramming of

the program EPROM memory during the development / prototyping phase of design. The SE370C75x devices

allow quick updates to breadboards and prototype systems while iterating initial designs.

The TMS370Cx5x family provides two low-power modes (STANDBY and HALT) for applications where

low-power consumption is critical. Both modes stop all central processing unit (CPU) activity (that is, no

instructions are executed). In the STANDBY mode, the internal oscillator and the general-purpose timer remain

active. In the HALT mode, all device activity is stopped. The device retains all RAM data and peripheral

configuration bits throughout both low-power modes.

The TMS370Cx5x features advanced register-to-register architecture that allows direct arithmetic and logical

operations without requiring an accumulator (for example, ADD R24, R47; add the contents of register 24 to

the contents of register 47 and store the result in register 47). The TMS370Cx5x family is fully

instruction-set-compatible, allowing easy transition between members of the TMS370 8-bit microcontroller

family.

The SPI and the two operational modes of the SCI1 give three methods of serial communications. The SCI1

allows standard RS-232-C communications interface between other common data transmission equipment,

while the SPI gives high-speed communications between simpler shift-register type devices, such as display

drivers, ADC1 converter, phase-locked loop (PLL), I/O expansion, or other microcontrollers in the system.

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