TPS2214A, TPS2216A

LOW-COST DUAL-SLOT PC CARD POWER SWITCH

FOR SERIAL PCMCIA CONTROLLERS

SLVS267 – DECEMBER 1999

9

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

D10

D9

D8

D7

D6

D5

D4

D3

D2

DATA

LATCH

CLOCK

D1

D0

Data Setup Time

Data Hold Time

Latch Delay Time

Clock Delay Time

NOTE: Data is clocked in on the positive edge of the clock. The positive edge of the latch signal should occur before the next positive edge of

the clock. For definition of D0 to D10, see the control logic table.

Figure 2. Serial-Interface Timing for Independent xVPP Switching When MODE = 5 V or 3.3 V

D8

D7

D6

D5

D4

D3

D2

D1

D0

DATA

LATCH

CLOCK

Data Setup Time

Data Hold Time

Latch Delay Time

Clock Delay Time

NOTE: Data is clocked in on the positive edge of the clock. The positive edge of the latch signal should occur before the next positive edge of

the clock. For definition of D0 to D8, see the control logic table.

Figure 3. Serial-Interface Timing When MODE = 0 V or Floating

FIGURE

Short-circuit current response, short applied to powered-on 5-V xVCC switch output

4

Short-circuit current response, short applied to powered-on 12-V xVPP switch output

5

OC response with ramped load on 5-V xVCC switch output

6

OC response with ramped load on 12-V xVPP switch output

7

† Timing tests are conducted at free-air temperature, VI(5V) = 5 V, VI(3.3V) = 3.3 V, VI(12V) = 12 V, CL = 0.1 µF on each output, STBY floating.