TRF2020

SYNTHESIZER FOR GLOBAL SYSTEM

FOR MOBILE (GSM) CELLULAR TELEPHONES

SLWS020B – FEBRUARY 1995 – REVISED JANUARY 1998

19

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

serial port operation

The TRF2020 device registers are manipulated via a synchronous serial data port. The timing relationships are

defined in Figure 2, in the parameter measurement information section. Four 24-bit words are clocked into

temporary holding registers with the least significant bit clocked first. The operation registers are loaded with

the new data residing in the temporary registers with the rising edge of the strobe input.

Each word can be written to the device independently. In this manner, only the words containing the information

required to change the current state of the device need to be written. To fully program the device, the words are

written in the following order:

Word-1

Auxiliary-1 synthesizer

Word-2

Auxiliary-2 synthesizer

Word-3

Device

Word-0

Main synthesizer

Word-3 follows Word-1 and Word-2 because the frequency information for the auxiliary synthesizers is stored

in the operational registers with Word-1 and Word-2. It is necessary to load this frequency information before

the speed-up mode is activated by the auxiliary synthesizers’ power enable bits in Word-3.

Word-0 is written last because the speed-up mode for the main synthesizers is activated by the writing of

Word-0. If the main synthesizer is to be enabled, the power enable bit is written to the device in the preceding

Word-3.

The two most significant bits of each word contain the unique address of the word; the balance of the 22 bits

contains the data fields.

serial word format

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

ADDR

DATA

0

0

C

B

A

0

1

G

F

E

D

1

0

N

M

L

K

J

H

1

1

V

U

T

S

R

P

serial word format function

A:

5-bit NM2 data for main divider coefficient

B:

11-bit NM1 data for main divider coefficient

C:

6-bit data to control speed-up mode time of main synthesizer analog switch

D:

3-bit NM2 data for auxiliary-1 divider coefficient

E:

11-bit NM1 data for auxiliary-1 divider coefficient

F:

2-bit data to select main synthesizer speed-up/normal mode current ratio

G:

6-bit data to control speed-up mode time of auxiliary synthesizers

H:

3-bit NM2 data for auxiliary-2 divider coefficient