LT3695 datasheet(21/28 Pages) LINER

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LT3695

3695f

LT3695’s output. If the VIN pin is allowed to ﬂoat and the

RUN/SS pin is held high (either by a logic signal or because

it is tied to VIN), then the LT3695’s internal circuitry will

pull its quiescent current through its SW pin. This is ﬁne

if your system can tolerate a few mA in this state. If you

ground the RUN/SS pin, the SW pin current will drop to

essentially zero. However, if the VIN pin is grounded while

the output is held high, then parasitic diodes inside the

LT3695 can pull large currents from the output through

the SW pin and the VIN pin. Figure 8 shows a circuit that

will run only when the input voltage is present and that

protects against a shorted or reversed input.

APPLICATIONS INFORMATION

3695 F09

LT3695

VIN

BACKUP

MBRS140

VOUT

VIN

GND

RUN/SS

BOOST

PGND

Figure 8. Diode D4 Prevents a Shorted Input from Discharging

a Backup Battery Tied to the Output. It Also Protects the Circuit

from a Reversed Input. The Regulator Runs Only when the Input

is Present

PCB Layout

For proper operation and minimum EMI, care must be taken

during printed circuit board layout. Figure 9 shows the

recommended component placement with trace, ground

plane and via locations. Note that large, switched currents

ﬂow in the LT3695’s VIN, SW and PGND pins, the catch

diode and the input capacitor (CIN). The loop formed by

these components should be as small as possible. These

VOUT

GND

VIN

GND

3695 F09

Figure 9. A Good PCB Layout Ensures Proper,

Low EMI Operation

components, along with the inductor and output capacitor

(COUT), should be placed on the same side of the circuit

board, and their connections should be made on that layer.

All connections to GND should be made at a common

star ground point or directly to a local, unbroken ground

plane below these components. The SW and BOOST nodes

should be laid out carefully to avoid interference. Finally,

keep the FB, RT and VC nodes small so that the ground

traces will shield them from the SW and BOOST nodes.

To keep thermal resistance low, extend the ground plane

as much as possible and add thermal vias under and near

the LT3695 to any additional ground planes within the

circuit board and on the bottom side. Keep in mind that

the thermal design must keep the junctions of the IC below

the speciﬁed absolute maximum temperature.

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