LT3695

22

3695f

APPLICATIONS INFORMATION

High Temperature Considerations

The PCB must provide heat sinking to keep the LT3695

cool. The Exposed Pad on the bottom of the package

may be soldered to a copper area which should be tied

to large copper layers below with thermal vias; these lay-

ers will spread the heat dissipated by the LT3695. Place

additional vias to reduce thermal resistance further. With

these steps, the thermal resistance from die (or junction)

to ambient can be reduced to

100 LFPM airflow, this resistance can fall by another 25%.

Further increases in airflow will lead to lower thermal

resistance. Because of the large output current capability

of the LT3695, it is possible to dissipate enough heat to

raise the junction temperature beyond the absolute maxi-

mum. When operating at high ambient temperatures, the

maximum load current should be derated as the ambient

temperature approaches these maximums. If the junction

temperature reaches the thermal shutdown threshold, the

part will stop switching to prevent internal damage due

to overheating.

Power dissipation within the LT3695 can be estimated

by calculating the total power loss from an efficiency

measurement. The die temperature rise is calculated by

multiplying the power dissipation of the LT3695 by the

thermal resistance from junction to ambient. Die tempera-

ture rise was measured on a 2-layer, 10cm

× 10cm circuit

For a 12V input to 5V output the die temperature elevation

above ambient was 22°C with the exposed pad soldered

and 44°C without the exposed pad soldered.

Fault Tolerance

The LT3695 is designed to tolerate single fault conditions.

Shorting two adjacent pins together or leaving one single

LT3695. However, the application circuit must meet the

requirements discussed in this section in order to achieve

this tolerance level.

Tables 5 and 6 show the effects that result from shorting

adjacent pins or from a floating pin, respectively.

Table 5: Effects of Pin Shorts

PINS

EFFECT

PGND-DA

SW-RUN/SS

The result of this short depends on the load resistance and on R3 (Figure 10). See the following discussion.

RUN/SS-RT

RT-SYNC

PG-GND

No effect.

GND-BD

voltage source supplying BD. Make sure it is safe to short the supply for BD to ground. For this reason BD should not be connected to

BD-BOOST