1.2MHz, Low-Cost,

High-Performance Chargers

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19

Applications Information

Setting Input Current Limit

The input current limit should be set based on the cur-

rent capability of the AC adapter and the tolerance of

the input current limit. The upper limit of the input cur-

rent threshold should never exceed the adapter’s mini-

mum available output current. For example, if the

adapter’s output current rating is 5A

±10%, the input

current limit should be selected so that its upper limit is

less than 5A

× 0.9 = 4.5A. Since the input current-limit

accuracy of the MAX17005B/MAX17006B/MAX17015B

is

±3%, the typical value of the input current limit should

be set at 4.5A/1.03

≈ 4.36A. The lower limit for input cur-

rent must also be considered. For chargers at the low

end of the specification, the input current limit for this

example could be 4.36A

× 0.95 or approximately 4.14A.

Layout and Bypassing

Bypass DCIN with a 0.1μF ceramic capacitor to ground

(Figure 1). N1 and N2 protect the MAX17005B/

MAX17006B/MAX17015B when the DC power source

in Figure 1.

Good PCB layout is required to achieve specified noise

immunity, efficiency, and stable performance. The PCB

layout designer must be given explicit instructions—

preferably, a sketch showing the placement of the

power switching components and high current routing.

Refer to the PCB layout in the MAX17005B/MAX17006B/

MAX17015B Evaluation Kit for examples. A ground

plane is essential for optimum performance. In most

applications, the circuit is located on a multilayer

board, and full use of the four or more copper layers is

recommended. Use the top layer for high-current con-

nections, the bottom layer for quiet connections, and

the inner layers for an uninterrupted ground plane.

Use the following step-by-step guide:

1) Place the high-power connections first, with their

grounds adjacent:

a) Minimize the current-sense resistor trace lengths,

and ensure accurate current sensing with Kelvin

connections.

b) Minimize ground trace lengths in the high-current

paths.

c) Minimize other trace lengths in the high-current

paths.

d) Use > 5mm wide traces in the high-current

paths.

length).

f) Minimize the LX node (MOSFETs, rectifier cath-

ode, inductor (15mm max length)). Keep LX on

one side of the PCB to reduce EMI radiation.

Ideally, surface-mount power components are flush

against one another with their ground terminals

almost touching. These high-current grounds are

then connected to each other with a wide, filled

zone of top-layer copper, so they do not go through

vias. The resulting top-layer subground plane is

connected to the normal inner-layer ground plane

at the paddle. Other high-current paths should also

be minimized, but focusing primarily on short

ground and current-sense connections eliminates

approximately 90% of all PCB layout problems.

2) Place the IC and signal components. Keep the

main switching node (LX node) away from sensitive

capacitor). Important: The IC must be no further

than 10mm from the current-sense resistors. Quiet

separate ground (AGND) island. There is very little

current flowing in these traces, so the ground island

need not be very large. When placed on an inner

layer, a sizable ground island can help simplify the

layout because the low-current connections can be

made through vias. The ground pad on the backside

of the package should also be connected to this

quiet ground island.

3) Keep the gate drive traces (DHI and DLO) as short

as possible (L < 20mm), and route them away from

should also be relatively wide (W > 1.25mm).

4) Place ceramic bypass capacitors close to the IC.

The bulk capacitors can be placed further away.

Place the current-sense input filter capacitors under

the part, connected directly to the PGND pin.

5) Use a single-point star ground placed directly

below the part at the PGND pin. Connect the power

ground (ground plane) and the quiet ground island

at this location.