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ADF4602BCPZ Datasheet(PDF) 20 Page - Analog Devices |
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ADF4602BCPZ Datasheet(HTML) 20 Page - Analog Devices |
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20 / 36 page ![]() ADF4602 Rev. 0 | Page 20 of 36 The receive baseband outputs have a programmable common mode voltage of 1.2 V or 1.4 V, selectable via the vcmsel bit in Register 15. Gain Control Gain control is distributed throughout the receive signal chain as shown in Figure 39. The RF front end contains 30 dB of control range: 18 dB in the LNA and 12 dB in the mixer transconductance stage. The two baseband active filter stages each provide 18 dB of gain control range in 6 dB steps. Filter characteristics (ripple and group delay) are best conserved if the active filter stages have equal gain. This results in a total of 36 dB gain control in 4× 12 dB steps for the filter stage. The variable gain amplifier (VGA) implements 24 dB of gain controllable in 1 dB steps. The base gain of the mixer is 18 dB, and the base gain of the VGA is −6 dB. This gives a total of 102 dB gain with 90 dB of gain control range. The base gain of the mixer stage is 18 dB in WCDMA mode and 27 dB in GSM mode. Table 6. Receive Gain Control in WCDMA mode Stage Gain Control Control Steps LNA 0 dB to +18 dB 3 × 6 dB steps Mixer +18 dB to +30 dB (WCDMA) +27 dB to +39 dB (GSM) 2 × 6 dB steps Filter 0 dB to +36 dB 3 × 12 dB steps VGA −6 dB to +18 dB 24 × 1 dB steps To simplify programming and to ensure optimum receiver performance and dynamic range, the user simply programs the total desired receive gain in dB via the rx_gain[6:0] bits in Register 11. The ADF4602 then decodes the gain setting and automatically distributes the gain between the various blocks. To allow some flexibility, predefined user inputs control the gain threshold points at which the LNA and mixer gain steps occur. Bit settings mixstep[3:0] and lnastep[3:0] control the mixer and LNA gain threshold steps, respectively. An Excel spreadsheet detailing the receive gain decode system is available from Analog Devices, Inc., on request. Figure 38 shows an example gain distribution profile. 120 110 100 90 80 70 60 50 40 30 20 10 0 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 REQUESTED Rx GAIN (dB) RF GAIN BASEBAND GAIN CHIP GAIN MIXSTEP = 10 LNASTEP = 6 GAINCAL = 8 Figure 38. Gain Distribution Between RF and Baseband Blocks for Default Setting 50 45 40 35 30 25 20 15 10 5 0 –5 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 REQUESTED Rx GAIN (dB) LNA GAIN MIXER GAIN FILTER GAIN VGA GAIN MIXSTEP = 10 LNASTEP = 6 GAINCAL = 8 Figure 39. More Detailed Gain Distribution Profile In addition, a gain calibration setting in Register 15 (gaincal[4:0]) is used to account for losses in the RF front end. The total gain in the ADF4602 is given by ReceiveGain = rxgain[6:0] − gaincal[4:0] + X (2) where X = 8 in WCDMA filter mode, and X = 17 in GSM filter mode. Rxgain[6:0] is the receive gain programmed in Register 11. Gaincal[4:0] is the gain calibration setting in Register 15, and is calculated using the following formula: gaincal[4:0] = 8 − front_end_losses (3) where front_end_losses is the loss in the receive path due to duplexers/switches. This is useful for referencing the programmed gain to the antenna and accounting for any losses in the path. For example, if the total receive front-end loss is 2 dB, the user should program gaincal[4:0] to 6 dB. If the user then requestes 80 dB of gain by programming rxgain[6:0] to 80 dB, the ADF4602 uses Equation 4 to give ReceiveGain = 80 − 6 + 8 = 82 dB (4) 82 dB is the receive gain used internally by the ADF4602. |
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