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ADF4602BCPZ Datasheet(PDF) 24 Page - Analog Devices |
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ADF4602BCPZ Datasheet(HTML) 24 Page - Analog Devices |
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24 / 36 page ![]() ADF4602 Rev. 0 | Page 24 of 36 REGISTERS REGISTER MAP A1 1 2 W 0x2FFD rxsynth en reset_ soft sif_ vsup8 txsynth en chipclk en refclk en rxbs[1:0] txbs txen ldoen[4:0] rxen W 0x0002 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D3 D4 D2 D1 D0 DEFAULT1 R/W A1 10 11 12 13 14 15 W W W W W W 0x9858 rxfreq[15:0] 0x0000 rxgain[6:0] 0x0FA6 0x103E 0xEE53 lnastep[3:0] nper0[3:0] nint0[3:0] mixstep[3:0] nper1[3:0] nint1[3:0] sdmen[3:0] nper2[3:0] nint2[3:0] rfskip[3:0] osadc2x[3:0] nint3[3:0] 0x0890 sdmosr gaincal[4:0] rxbw[2:0] swapi swapq vcmsel D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D3 D4 D2 D1 D0 DEFAULT1 R/W A1 21 22 26 28 31 W W W W W 0x001F vcm_sat_thres[5:0] cmmod test_Q/swap_Q test_I/swap_I gain_blanksel [1:0] 0x8000 padac1[4:0] padac2_ow[5:0] gpo_ow[3:0] dacgpo _owen 0x0000 txfreq[15:0] 0x0001 txpwr_set[11:0] cntrl_ mode 0x0000 nvmld D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D3 D4 D2 D1 D0 DEFAULT1 R/W SUB-ADDRESS REGISTERS TRANSMITTER USER REGISTERS RECEIVER USER REGISTERS GENERAL USER REGISTERS A1 A2 0 144 0 151 0 153 0 155 0 165 0 170 0 171 0 174 0 W W W W W W W W W 0x06 reserved[1:0] 0x6F 0x85 0x78 0x20 vsup2[7:0] reserved[7:0] reserved[7:0] reserved[7:0] 0xF0 en_mix[3:0] 0x042 buffstate 0x5F3 0x14 buff_value[7:0] reserved[7:0] 175 D7 D6 D5 D3 D4 D2 D1 D0 DEFAULT1 R/W NOTES 1THESE ARE RECOMMENDED DEFAULT SETTINGS THAT SHOULD BE PROGRAMMED INTO THE REGISTERS. 2DEFAULT SHOWN IS FOR BAND 1 OPERATION. SET TO 0x00 IF TRANSMIT FREQUENCY < 21100MHz. 3DEFAULT SHOWN IS FOR BAND 1 OPERATION. SET TO 0x50 IF TRANSMIT FREQUENCY < 21100MHz. Figure 44. Register Map |
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