LTC2637 datasheet(16/28 Pages) LINER

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LTC2637

2637fa

pin Functions

VCC (Pin 1/Pin 1): Supply Voltage Input. 2.7V ≤ VCC ≤ 5.5V

(LTC2637-L) or 4.5V ≤ VCC ≤ 5.5V (LTC2637-H). Bypass

to GND with a 0.1µF capacitor.

VOUTA to VOUTH (Pins 2–5, 10–13/Pins 2–5, 12–15): DAC

Analog Voltage Outputs.

CAO (Pin 6/Pin 7): Chip Address Bit 0. Tie this pin to VCC,

GND or leave it floating to select an I2C slave address for

the part (See Tables 1 and 2).

SCL (Pin 7/Pin 8): Serial Clock Input Pin. Data is shifted

into the SDA pin at the rising edges of the clock. This

high impedance pin requires a pull-up resistor or current

source to VCC.

SDA (Pin 8/Pin 9): Serial Data Bidirectional Pin. Data is

shifted into the SDA pin and acknowledged by the SDA

pin. This pin is high impedance while data is shifted in.

OpendrainN-channeloutputduringacknowledgment.SDA

requires a pull-up resistor or current source to VCC.

REF (Pin 9/Pin 11): Reference Voltage Input or Output.

When External Reference mode is selected, REF is an input

(1V ≤ VREF ≤ VCC) where the voltage supplied sets the

full-scale DAC output voltage. When Internal Reference

is selected, the 10ppm/°C 1.25V (LTC2637-L) or 2.048V

(LTC2637-H)internalreference(halffull-scale)isavailable

at the pin. This output may be bypassed to GND with up

to 10µF, and must be buffered when driving external DC

load current.

GND (Pin 14/Pin 16): Ground.

CA2 (Pin 6, MSOP only): Chip Address Bit 2. Tie this pin

to VCC, GND or leave it floating to select an I2C slave ad-

dress for the part (See Table 1).

CA1 (Pin 10, MSOP only): Chip Address Bit 1. Tie this

pin to VCC, GND or leave it floating to select an I2C slave

address for the part (See Table 1).

Exposed Pad (Pin 15, DFN Only): Ground. Must be

soldered to PCB Ground.

(DFN/MSOP)

LTC2637 Datasheet(PDF) 16 Page - Linear Technology