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SN75DP120RHHT Datasheet(PDF) 8 Page - Texas Instruments |
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SN75DP120RHHT Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 27 page ![]() SN75DP120 SLLSE08 – OCTOBER 2009 www.ti.com THERMAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX (1) UNIT RθJB Junction-to-board thermal 4x4 Thermal vias under PowerPAD 4.35 °C/W resistance RθJC Junction-to-case thermal 20.3 °C/W resistance PN Device power in Active Mode LP# = VCC, ML: VOD = 1200mVp-p, 2.7Gbps PRBS; 720 mW AUX: VID = 1000mVp-p, 1Mbps PRBS; VDD= 3.6V, VCC=3.6V Highest power level. All lanes running at largest VOD swing. Device Power under D3 LP# = VCC, ML: VID = 0mVp-p, AUX: VID = 0mVp-p; 44 mW PPDWN Power Down Mode or VDD= 3.6V, VCC=3.6V Standby Device power dissipation in LP# = 0V, VDD= 3.6V, VCC=3.6V, HPD_INV = NC, 0V 40 µW PLP Shutdown mode LP# = 0V, VDD= 3.6V, VCC=3.6, HPD_INV=VCC 2.5 mW (1) The maximum rating is simulated under VDD, VCC = 3.6V. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT VDD HPD_SRC and CAD_SRC reference voltage; HPD_SRC Ref voltage only when 1.62 3.6 V HPD_INV = 0V VCC Supply voltage 3 3.3 3.6 V TA Operating free-air temperature 0 85 °C MAIN LINK DIFFERENTIAL PINS (INX, OUTX) VID Peak-to-peak input differential voltage 0.20 1.40 Vp-p dR Data rate 2.7 Gbps Rt Termination resistance 40 50 60 Ω VCM Output common mode voltage 0 2 V AUXILIARY PINS (AUX_IN) VI Input voltage 0 5.25 V dR(AUX) Auxiliary data rate 1 Mbps HPD_SINK AND CAD_SINK VIH High-level input voltage 1.9 3.6 V VIL Low-level input voltage 0 0.8 V CONTROL PINS (LP#, HPD_INV, CAD_INV) VIH High-level input voltage 1.9 3.6 V VIL Low-level input voltage 0 0.8 V DEVICE POWER The SN75DP120 main and AUX link is designed to run from a single supply voltage of 3.3V. However since the device has a built in level shifter, another supply voltage (VDD) is needed to set the voltage level of HPD_SRC and CAD_SRC pins. NOTE An external capacitor may be required on LP# pin if that pin is tied to the supply through a pullup resistor. The capacitor specifies a proper power on reset for the device. See Applications section for recommended resistor and capacitor values. 8 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN75DP120 |
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