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SN75DP120RHHT Datasheet(PDF) 14 Page - Texas Instruments |
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SN75DP120RHHT Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 27 page  SN75DP120 SLLSE08 – OCTOBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over recommended operating (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Driver output pre-emphasis 0 dB VPRE(0) All VOD levels 0 dB Level VOD = VODpp(1), Driver output pre-emphasis See Figure 3-3 in DP CTS1.1, VPRE(1) VODpp(2), 3.5 dB 3.5 dB Level PRBS7 pattern at 1.67 Gbps and 2.7 VODpp(3) Gbps, Driver output pre-emphasis VOD = VODpp(1), Measured at TP1 VPRE(2) 6.0 dB 6 dB level VODpp(2) Driver output pre-emphasis VPRE(3) VOD = VODpp(1) 9.5 dB 9.5 dB level Driver output pre-emphasis VPRE2(0) Measured at TP2 0 dB 0dB level ΔVPRE1 2.5 dB Measured at TP2, ΔVPRE2 Pre-emphasis delta At each supported pre-emphasis level: 1.9 dB Δ VPREn = VPRE2(n+1) - VPRE2(n) ΔVPRE3 1.9 dB Pre-emphasis non-transition All supported pre-emphasis levels, VPRE_NPP 40 mV-pp peak-to-peak voltage range Measured at TP2 ROUT2 Driver output impedance 40 50 60 Ω RINT Input termination impedance 40 50 60 Ω VIterm Input termination voltage 0 2 V VOterm Output common mode voltage 0 2 V Measured at 1.62Gbps and 2.7Gbps (All output and pre- VTXACCM Output AC common mode voltage emphasis levels), 20 mVrms Measured at TP2 ITXSHORT Output short circuit current limit OUT pins shorted to GND 50 mA IRXSHORT Input short circuit current limit IN pins shorted to GND 50 mA SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Differential Output edge rate No pre-emphasis, 800mV differential swing, tR/F(DP) 60 150 ps (20%–80%) Measured at TP1, PRBS7 dR = 2.7Gbps, No pre-emphasis, 800 mV differential voltage tPD(ML) Propagation delay time 450 ps swing, See Figure 9 dR = 2.7Gbps, No pre-emphasis, 800 mV differential voltage tSK(1) Output Intra-pair skew 15 ps swing, PRBS7, See Figure 10 dR = 2.7Gbps, No pre-emphasis, 800 mV differential voltage tSK(2) Output Inter-pair skew(1) 40 ps swing, PRBS7 No pre-emphasis, All levels differential dR = 2.7 Gbps 10 Peak-to-peak output residual jitter at voltage swing, PRBS7. Vid = 400 mVpp tDPJIT1(PP) ps Pkg Pins dR = 1.62 Gbps 10 TTP3-TTP2 in Figure 11 No pre-emphasis, All levels differential dR = 2.7 Gbps 0.08 voltage swing, PRBS7. Vid = 400 mVpp, tDPJIT2(PP) Peak-to-peak output residual jitter UI dR = 1.62 Gbps 0.06 TTP4-TTP1 in Figure 11 dR = 2.7 Gbps 100 Intra-pair skew at the input package tSK(in) ps pins dR = 1.62 Gbps 300 dR = 2.25 Gbps, CAD_SINK = H , Input Vid = 600 mVp-p, Peak-to-peak output residual jitter at TTMDSJIT1(PP) 10 ps Pkg Pins No pre-emphasis, See Figure 12 dR = 2.25 Gbps CAD_SINK = H, Input Vid = 600 mVp-p, TTMDSJIT2(PP) Peak-to-peak output residual jitter 0.1 UI No pre-emphasis, See Figure 12 (1) tSK(2) is the magnitude of the time difference between tPD(ML) of any two mainlink outputs on a single device. 14 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN75DP120 |
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