ATXMEGA64A1 datasheet(90/99 Pages) ATMEL

90 / 99 page

8067I–AVR–04/09

XMEGA A1

14. Flash Power Reduction Mode can not be enabled when entering sleep mode

If Flash Power Reduction Mode is enabled when entering Power-save or Extended Standby

sleep mode, the device will only wake up on every fourth wake-up request.

If Flash Power Reduction Mode is enabled when entering Idle sleep mode, the wake-up time

will vary with up to 16 CPU clock cycles.

Problem fix/Workaround

Disable Flash Power Reduction mode before entering sleep mode.

15. JTAG enable does not override Analog Comparator B output

When JTAG is enabled this will not override the Anlog Comparator B (ACB)ouput, AC0OUT

on pin 7 if this is enabled.

Problem fix/Workaround

AC0OUT for ACB should not be enabled when JTAG is used. Use only analog comparator

output for ACA when JTAG is used, or use the PDI as debug interface.

16. Bandgap measurement with the ADC is non-functional when V

CC is below 2.7V

The ADC cannot be used to do bandgap measurements when V

CC is below 2.7V.

Problem fix/Workaround

If internal voltages must be measured when V

CC is below 2.7V, measure the internal 1.00V

reference instead of the bandgap.

17. DAC refresh may be blocked in S/H mode

If the DAC is running in Sample and Hold (S/H) mode and conversion for one channel is

done at maximum rate (i.e. the DAC is always busy doing conversion for this channel), this

will block refresh signals to the second channel.

Problem fix/Workarund

When using the DAC in S/H mode, ensure that none of the channels is running at maximum

conversion rate, or ensure that the conversion rate of both channels is high enough to not

require refresh.

ATXMEGA64A1 Datasheet(PDF) 90 Page - ATMEL Corporation