AD7291 datasheet(19/21 Pages) AD

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Preliminary Technical Data

AD7291

Rev. PrC | Page 19 of 21

SERIAL BUS ADDRESS BYTE

The first byte the user writes to the device is the slave address

byte. Similar to all I2C-compatible devices, the AD7291 has a

7-bit serial address. The 4 LSBs are user-programmable by the

3 three-state input pins, AS0 and AS1 as shown in Table 29.

In Table 29, H means tie the pin to VDRIVE, L means tie the pin

to GND, and NC refers to a pin left floating. Note that in this

final case, the stray capacitance on the pin must be less than

30 pF to allow correct detection of the floating state; therefore,

any PCB trace must be kept as short as possible.

Table 29. Slave Address Control Using Three-State Input

Pins

AS1

AS0

Slave Address(A6 to A0)

Binary

Hex

010 0000

0x20

010 0010

0x22

GND

010 0011

0x23

010 1000

0x28

010 1010

0x2A

GND

010 1011

0x2B

GND

010 1100

0x2C

GND

010 1110

0x2E

GND

010 1111

0x2F

INTERFACE PROTOCOL

The AD7291 uses the following I2C protocols.

Writing Two Bytes of Data to a 16-Bit Register

All registers on the AD7921 are 16 bit registers; therefore, two

bytes of data are required to write a value to any one of these

registers. Writing two bytes of data to a registers consists of the

following sequence:

1. The master device asserts a start condition on SDA.

2. The master sends the 7-bit slave address followed by the

write bit (low).

3. The addressed slave device asserts an acknowledge on SDA.

4. The master sends a register address. The slave asserts an

acknowledge on SDA.

5. The master sends the first data byte (most significant).

6. The slave asserts an acknowledge on SDA.

7. The master sends the second data byte (least significant).

8. The slave asserts an acknowledge on SDA.

9. The master asserts a stop condition on SDA to end the

transaction.

Writing to Multiple Registers

Writing to multiple address registers consists of the following:

1. The master device asserts a start condition on SDA.

2. The master sends the 7-bit slave address followed by the

write bit (low).

3. The addressed slave device (AD7291) asserts an

acknowledge on SDA.

4. The master sends a register address, for example the

DATAHIGH CH1 register address. The slave asserts an

acknowledge on SDA.

5. The master sends the first data byte.

6. The slave asserts an acknowledge on SDA.

7. The master sends the second data byte.

8. The slave asserts an acknowledge on SDA.

9. The master sends a second register address, for example

the Command register. The slave asserts an acknowledge

on SDA.

10. The master sends the first data byte.

11. The slave asserts an acknowledge on SDA.

12. The master sends the second data byte.

13. The slave asserts an acknowledge on SDA.

14. The master asserts a stop condition on SDA to end the

transaction.

The previous examples detail writing to two registers only (the

DATAHIGH CH1 register and the Command register). However,

the AD7291 can read from multiple registers in one write

operation as shown in Table 12.

Figure 12. Writing Two Bytes of Data to a 16-Bit Register

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