EVAL-ADE7858EBZ datasheet(35/76 Pages) AD

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Preliminary Technical Data

ADE7858

Rev. PrA | Page 35 of 76

enabled by setting bits 8, 7, 6 in MASK0[31:0] register. If

enabled, the

IRQ pin is set low and the status bit is set to 1

whenever a change of sign occurs. To find the phase that

triggered the interrupt, PHSIGN[15:0] register is read

immediately after reading STATUS0[31:0]. Then the status bit is

cleared and

IRQ pin is set back high by writing STATUS0

Active Energy Calculation

As previously stated, power is defined as the rate of energy flow.

This relationship can be expressed mathematically as

dEnergy

Power 

(21)

Conversely, Energy is given as the integral of power.

dt





Energy

(22)

HPF

AVGAIN

Digital

Integrator



AIGAIN

APHCAL

LPF

AWATTOS



ACCUMULATOR

WTHR[47:0]



32 bit register

AWATTHR[31:0]

Digital Signal Processor

REVAPA bit in

STATUS0[31:0]

AWGAIN

HPFDIS[23:0]

Figure 41. ADE7858 Total Active Energy Accumulation

Total active energy accumulation is always a signed operation.

Negative energy is subtracted from the active energy contents.

The ADE7858 achieves the integration of the active power

signal in two stages (see Figure 41). The first stage is done

inside the DSP: every 125μsec (8KHz frequency), the

instantaneous phase total active power is accumulated into an

internal register. When a threshold is reached, a pulse is

generated at processor port and the threshold is subtracted

from the internal register. The sign of the energy in this

moment is considered the sign of the active power (see Sign of

Active Power Calculation section for details). The second stage

is done outside the DSP and consists in accumulating the pulses

generated by the processor into internal 32-bit accumulation

registers. The content of these registers is transferred to watt-

hr registers xWATTHR[31:0], x=A,B,C when these registers are

accessed.

DSP

generated

pulses

WTHR[47:0]

active power

accumulation in

DSP

1 DSP pulse = 1LSB of WATTHR[47:0]

Figure 42. Active Power Accumulation inside DSP

Figure 42 explains this process. The WTHR[47:0] 48-bit signed

is common for all phase total active powers. Its value depends

on how much energy is assigned to 1LSB of watt-hour registers.

Let’s suppose a derivative of wh [10n wh], n an integer, is desired

as 1LSB of WATTHR. Then WTHR is computed using the

following expression:

3600

PMAX

WTHR





(23)

where:

PMAX=33,516,139=0x1FF6A6B is the instantaneous power

computed when the ADC inputs are at full scale.

fs=8KHz is the frequency with which the DSP computes the

instantaneous power.

UFS, IFS are the rms values of phase voltages and currents when

the ADC inputs are at full scale.

The maximum value that may be written on WTHR[47:0] is

247-1. The minimum value is 0x0, but it is recommended to

write a number equal or greater than PMAX. Negative numbers

should never be used.

The WTHR[47:0] is a 48-bit register. As previously stated, the

serial ports of the ADE7858 work on 32, 16 or 8-bit words. As

presented in Figure 43, WTHR register is accessed as two 32-bit

registers (WTHR1[31:0] and WTHR0[31:0]), each having 8

most significant bits padded with 0s.

EVAL-ADE7858EBZ Datasheet(PDF) 35 Page - Analog Devices

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