34825 datasheet(26/39 Pages) FREESCALE

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reset

VVDDPOR

VDD

I2C_SDA

I2C-Bus

Reset

Detection

Delay

Time

I2C_SCL

VDDIO

Reset

Detection

Analog Integrated Circuit Device Data

Freescale Semiconductor

34825

FUNCTIONAL DEVICE OPERATION

LOGIC CONTROL FEATURES

Figure 19. Sources of Reset in 34825

I2C_SDA

I2C_SCL

Reset

Condition

Start

Condition

Stop

Condition

Reset

8.8~13.5ms

Figure 20. Hardware Reset Using the I2C Bus

VDDIO

Reset

tVDDIODGT_F

Figure 21. Hardware Reset Using the VDDIO Input

INTERRUPT

There are eight interrupt sources in the 34825 causing an

interrupt at the INT pin to the host IC. They are accessory

attachment, accessory detachment, short-key press, long

key press, long-pressed key release, VBUS voltage OVP, the

IC temperature OTP, and either the OVP or the OTP

condition is removed. The 34825 detects each event and sets

the corresponding bit in the Interrupt register. As long as the

Interrupt register is set, the INT pin outputs low voltage. The

Interrupt register is not writable. When the Interrupt register is

read, the Interrupt register is cleared automatically. Once the

Interrupt register is cleared, the INT pin returns to high

voltage.

An interrupt mask register is provided to mask unwanted

interrupt source. When the bit of the Interrupt Mask register

is set to 1, the corresponding interrupt source is blocked. The

INT does not output low voltage even though this interrupt bit

is set in the Interrupt register.

LOGIC OUTPUT

There are three logic outputs pins:TEST1, TEST2 and

ISET. They are controlled by the register bits with the same

name in the Control register if the attached accessory is NOT

a test cable. The TEST2 output is a push-pull output with the

voltage pulled up to the VDDIO, and the rest of them are

open-drain outputs.

The ISET generally is used to control the charge current

level. A typical charger IC uses one external resistor to set

34825 Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc

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