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34825 Datasheet(PDF) 27 Page - Freescale Semiconductor, Inc |
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34825 Datasheet(HTML) 27 Page - Freescale Semiconductor, Inc |
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27 / 39 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 27 34825 FUNCTIONAL DEVICE OPERATION I2C SERIAL BUS INTERFACE the charge current. By using ISET output, the charger IC can use two external resistors in parallel to set two charge current levels, as shown in Figure 27. I2C SERIAL BUS INTERFACE The I2C bus is enabled in the Standby, the Power Save, and the Active modes. The serial clock (SCL) and the serial data (SDA) lines must be connected to a positive supply using pull-up resistors. Internally the I2C bus voltage is referenced to the VDDIO input. The 34825 is a slave device. Maximum data rate is 400 kbps. ADDRESSING AND PROTOCOL The 7-bit address for the 34825 is 0100101, as shown in Figure 22. 0 1 0 0 10 1 R/W Figure 22. I2C Slave Address The following three figures show three I2C-bus transaction protocols. The Word Address is an 8-bit register address in the 34825. Figure 23. Master Transmits to Slave (Write Mode) Figure 24. Master Reads After Setting Word Address (Write Word Address and then Read Data) |
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