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ST7585 Datasheet(PDF) 23 Page - Sitronix Technology Co., Ltd. |
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ST7585 Datasheet(HTML) 23 Page - Sitronix Technology Co., Ltd. |
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23 / 51 page ![]() ST7585 Ver 1.0c 23/51 2009/04/14 9-2. INSTRUCTION DESCRIPTION H=0 or 1 (H-Flag Independent) Function Set A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 1 0 0 PD V H Flag Description PD PD=0: chip is active PD=1: chip is in power down mode All LCD outputs at VSS (display off), bias generator and V0 generator off, VOUT can be disconnected, oscillator off (external clock possible), RAM contents not cleared; RAM data can be written. V Select addressing mode: V=0 for Horizontal Addressing; V=1 for Vertical Addressing. H H=0: Basic Instruction set; H=1: Extended instruction set. Data access can be used in both instruction blocks. Refer to the instruction table. Read Data By specify the column address and page address, the display data in DDRAM can be read by MPU (parallel interface). A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 1 1 Read Data Write Data 8-bit data of Display Data from the microprocessor can be written to the RAM location specified by the column address and page address. The column address is increased by 1 automatically so that the microprocessor can continuously write data to the addressed page. During auto-increment, the column address wraps to 0 after the last column is written. A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 1 0 Write Data H=0 (Basic Instruction) Display Control This bits D and E selects the display mode. A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 1 D 0 E Flag Description D,E D E The bits D and E select the display mode. 0 0 Display OFF 0 1 All display segments on 1 0 Normal mode 1 1 Inverse video mode |
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