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MAX11047 Datasheet(PDF) 10 Page - Maxim Integrated Products |
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MAX11047 Datasheet(HTML) 10 Page - Maxim Integrated Products |
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10 / 18 page ![]() 4-/6-/8-Channel, 16-Bit, Simultaneous-Sampling ADCs 10 ______________________________________________________________________________________ Detailed Description The MAX11047/MAX11048/MAX11049 are fast, low- power ADCs that combine 4, 6, or 8 independent ADC channels in a single IC. Each channel includes simulta- neously sampling independent T/H circuitry that pre- serves relative phase information between inputs making the MAX11047/MAX11048/MAX11049 ideal for motor control and power monitoring. The MAX11047/ MAX11048/MAX11049 are available with a 0 to 5V input range that features ±20mA overrange, fault-tolerant inputs. The MAX11047/MAX11048/MAX11049 operate with a single 4.75V to 5.25V supply. A separate 2.7V to 5.25V supply for digital circuitry makes the devices compatible with low-voltage processors. The MAX11047/MAX11048/MAX11049 perform conver- sions for all channels in parallel by activating indepen- dent ADCs. Results are available through a high-speed, 20MHz, parallel data bus after a conversion time of 3μs following the end of a sample. The data bus is bidirec- tional and allows for easy programming of the configura- tion register. The MAX11047/MAX11048/MAX11049 feature a reference buffer, which is driven by an internal bandgap reference circuit (VREFIO = 4.096V). Drive REFIO with an external reference or bypass with a 0.1μF capacitor to ground when using the internal reference. Analog Inputs Track and Hold (T/H) To preserve phase information across all channels, each input includes a dedicated T/H circuitry. The input tracking circuitry provides a 4MHz small-signal band- width, enabling the device to digitize high-speed tran- sient events and measure periodic signals with bandwidths exceeding the ADC’s sampling rate by using undersampling techniques. Use anti-alias filtering to avoid high-frequency signals being aliased into the frequency band of interest. Input Range and Protection The full-scale analog input voltage is a product of the reference voltage. For MAX11047/MAX11048/ MAX11049, the input is unipolar in the range of: In external reference mode, drive VREFIO with a 3.0V to 4.25V source, resulting in a full-scale input range of 3.662V to 5.188V, respectively. All analog inputs are fault-protected up to ±20mA. The MAX11047/MAX11048/MAX11049 include an input clamping circuit that activates when the input voltage at the analog input is above (VAVDD + 300mV) or below -300mV. The clamp circuit remains high impedance while the input signal is within the range of 0V to +VAVDD and draws little to no current. However, when the input signal exceeds the range of 0V to +VAVDD, the clamps begin to turn on. Consequently, to obtain the highest accuracy, ensure that the input voltage does not exceed the range of 0V to +VAVDD. To make use of the input clamps, connect a resistor (RS) between the analog input and the voltage source to limit the voltage at the analog input so that the fault current into the MAX11047/MAX11048/MAX11049 does not exceed ±20mA. Note that the voltage at the analog input pin limits to approximately 7V during a fault condi- tion so the following equation can be used to calculate the value of RS: 0 50 4 096 to V x REFIO + . . Pin Description (continued) PIN NAME FUNCTION 42 CH6 Channel 6 Analog Input for MAX11049. Channel 5 for MAX11048. 45 CH7 Channel 7 Analog Input for MAX11049 52 WR Active-Low Write Input. Drive WR low to write to the ADC. Configuration registers are loaded on the rising edge of WR. 53 CS Active-Low Chip-Select Input. Drive CS low when reading from or writing to the ADC. 54 RD Active-Low Read Input. Drive RD low to read from the ADC. Each rising edge of RD advances the channel output on the data bus. 55 DB15 16-Bit Parallel Data Bus Digital Out Bit 15 56 DB14 16-Bit Parallel Data Bus Digital Out Bit 14 —EP Exposed Pad. Internally connected to AGND. Connect to a large ground plane to maximize thermal performance. Not intended as an electrical connection point. |
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