LT3032IDE datasheet(13/20 Pages) LINER

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LT3032

3032f

The LT3032 is a dual 150mA positive and negative low noise

low dropout linear regulator with micropower quiescent

current and shutdown. It supplies ±150mA at a dropout

of 300mV. Output voltage noise can be lowered on the

positive side to 20μVRMS and to 30μVRMS on the negative

side over the 10Hz to 100kHz bandwidth with the addition

of 0.01μF reference bypass capacitors. Additionally, the

reference bypass capacitors improve transient response,

lowering the settling time for transient load conditions.

Quiescent current is 20μA for the positive side and –30μA

for the negative side, typically dropping to less than 3μA

total in shutdown. In addition to the low quiescent current,

the LT3032 incorporates several protection features which

make it ideal for use in battery-powered systems. If the

load is common mode between the two outputs, it does

not matter which output starts ﬁrst; either output can be

pulled to the opposing side of ground and the regulator

will still start and operate.

Setting Output Voltage

The LT3032 has output voltage ranges of 1.22V to 20V for

the positive side and –1.22V to –20V for the negative side.

The output voltages are set by the ratio of two external

resistor dividers as shown in Figure 1. The LT3032 servos

the outputs to maintain the voltages at the ADJP and ADJN

pins to 1.22V and –1.22V, respectively. The current in the

bottom resistor of each divider (R1P or R1N) is equal to

1.22V/R1 and the current in the top resistor (R2P or R2N)

is equal to the current in the bottom resistor plus the

respective ADJP/ADJN pin bias current. The bias current

for ADJP and ADJN is 30nA at 25°C, ﬂowing into the pin

for ADJP and ﬂowing out of the pin for ADJN. The output

voltages can then be calculated using the formulas shown

in Figure 1. The value of R1P or R1N should be less than

250k to minimize errors in the resultant output voltage

caused by the ADJP/ADJN pin bias current. Note that

in shutdown the respective output is turned off and the

divider current will be zero. Curves of ADJP Pin Voltage,

ADJN Pin Voltage, ADJP Pin Bias Current, and ADJN Pin

Bias Current (all vs Temperature) appear in the Typical

Performance Characteristics.

The LT3032 is tested and speciﬁed with the ADJP/ADJN

pin tied to the respective OUTP/OUTN pin and a ±5μA DC

load (unless otherwise speciﬁed) for an output voltage

of ±1.22V. Speciﬁcations for output voltages greater than

this will be proportional to ±1.22V; (VOUT/±1.22V). For

example, load regulation for an output current change

of 1mA to 150mA is –2mV typical at VOUTN = –1.22V. At

VOUTN = –12V, load regulation is:

(–12V/–1.22V)•(–2mV) = –19.6mV

Bypass Capacitors and Low Noise Performance

The LT3032 provides reasonable noise performance

without reference bypass capacitors from OUTP/OUTN

to the corresponding BYPP/BYPN pin. Using the LT3032

with the addition of reference bypass capacitors lowers

output voltage noise. Good quality low leakage capacitors

are recommended. These capacitors bypass the internal

references for the positive and negative sides of the LT3032,

providing low frequency noise poles. The noise poles

provided by the bypass capacitors decrease the output

voltage noise to as low as 20μVRMS for the positive side

and 30μVRMS for the negative side with the use of 0.01μF

bypass capacitors.

The BYPP pin and BYPN pin are high impedance nodes

and leakage into or out of these pins affects the reference

voltage. The BYPP pin operates at approximately 74mV

Figure 1. Setting Output Voltages

APPLICATIONS INFORMATION

LT3032

OUTP

VOUTP

VOUTN

R2P

R1P

R1N

R2N

ADJP

GND

ADJN

OUTN

3032 F01

IR P

OUTP

ADJP

⎛

⎝

⎜

⎞

⎠

⎟+

()()

122

InA at

OUTPUT RANGE

V TO

ADJP =°

= .

IR N

OUTN

ADJN

⎛

⎝

⎜

⎞

⎠

⎟+

()()

–.

–

122

1..

–

–.

–

122

InA at

OUTPUT RANGE

V TO

ADJN =°

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