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WM8148 Datasheet(PDF) 11 Page - Wolfson Microelectronics plc |
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WM8148 Datasheet(HTML) 11 Page - Wolfson Microelectronics plc |
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11 / 43 page  WM8148 Production Data WOLFSON MICROELECTRONICS LTD PD Rev 4.0 April 1999 11 SERIAL INTERFACE SCK SDI SEN SDO t SPER t SCKL t SCKH t SSU t SH t SCE t SEW t SEC t SESD t SCSD t SCSDZ Figure 7 Serial Interface Timing TEST CONDITIONS AVDD = 4.75 to 5.25V, DVDD1 and DVDD2 = 2.97 to 5.25V, AGND = DGND = 0V, TA = 0 to 70 °C, MCLK = 48MHz unless otherwise stated (AVDD denotes the voltage applied to all AVDD pins). PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS SCK period tSPER 83.3 ns SCK high tSCKH 20 ns SCK low tSCKL 20 ns SDI set-up time tSSU 10 ns SDI hold time tSH 10 ns SCK to SEN set-up time tSCE 20 ns SEN to SCK set-up time tSEC 20 ns SEN pulse width tSEW 50 ns SEN low to SDO out tSESD 35 ns SCK low to SDO out tSCSD 35 ns SCK low to SDO high impedance tSCSDZ 25 ns Note: Parameters are measured at 50% of the rising/falling edge. |
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