TMS320DM365 datasheet(24/211 Pages) TI

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TMS320DM365

SPRS457C – MARCH 2009 – REVISED APRIL 2010

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Table 2-5. Pin Descriptions (continued)

Name

BGA

Type

Group

Power

IPU

Reset

Description(4)

(1)

Supply(2)

IPD(3)

State

YOUT7(R7)(8)

G16

I/O

VENC

VDDS33

Input

Digital Video Out: VENC settings determine

function(9).

For more details, see the DM36x DMSoC Video

Processor Back End User's Guide (SPRUFG9).

YOUT6(R6)(8)

G19

I/O

VENC

VDDS33

Input

Digital Video Out: VENC settings determine

function(9).

For more details, see the DM36x DMSoC Video

Processor Back End User's Guide (SPRUFG9).

YOUT5(R5)(8)

F15

I/O

VENC

VDDS33

Input

Digital Video Out: VENC settings determine

function(9).

For more details, see the DM36x DMSoC Video

Processor Back End User's Guide (SPRUFG9).

YOUT4(R4)(8)

F18

I/O

VENC

VDDS33

Input

Digital Video Out: VENC settings determine

function(9).

For more details, see the DM36x DMSoC Video

Processor Back End User's Guide (SPRUFG9).

YOUT3(R3)(8)

F16

I/O

VENC

VDDS33

Input

Digital Video Out: VENC settings determine

function(9).

For more details, see the DM36x DMSoC Video

Processor Back End User's Guide (SPRUFG9).

YOUT2(G7)(8)

F19

I/O

VENC

VDDS33

Input

Digital Video Out: VENC settings determine

function(9).

For more details, see the DM36x DMSoC Video

Processor Back End User's Guide (SPRUFG9).

YOUT1(G6)(10)

F17

I/O

VENC

VDDS33

Input

Digital Video Out: VENC settings determine

function(11).

For more details, see the DM36x DMSoC Video

Processor Back End User's Guide (SPRUFG9).

YOUT0(G5)(10)

E16

I/O

VENC

VDDS33

Input

Digital Video Out: VENC settings determine

function(11).

For more details, see the DM36x DMSoC Video

Processor Back End User's Guide (SPRUFG9).

HSYNC / GIO84

G15

I/O

VENC /

VDDS33

Input

Video Encoder: Horizontal Sync(11)

GIO

GIO: GIO[84]

VSYNC / GIO83

G18

I/O

VENC /

VDDS33

Input

Video Encoder: Vertical Sync(11)

GIO

GIO: GIO[83]

LCD_OE / GIO82

C19

I/O

VENC /

VDDS33

Output

Video Encoder: Data valid duration (11)

GIO

GIO: GIO[82]

(8)

The Y output (YOUT[7:0]) and C output (COUT[7:0]) buses can be swapped by programming the field bit YCOUTSWP in the VPFE

CCD Configuration (CCDCFG) register (0x01C7 0136h). If the YCOUTSWP bit is 0 (default), YOUT[7:0] = Y signal / COUT[7:0] = C

signal . If the YCOUTSWP bit is 1, YOUT[7:0] = C signal / COUT[7:0] = Y signal. For more information, see the TMS320DM36x Video

Processing Front End (VPFE) Reference Guide (literature number SPRUFG8).

(9)

To reduce EMI and reflections, depending on the trace length, approximately 22

Ω to 50 Ω damping resistors are recommend on the

following outputs placed near the device: YOUT(0-7),COUT(0-7), HSYNC,VSYNC,LCD_OE,FIELD, and,VCLK. The trace lengths should

be minimized.

(10) The Y output (YOUT[7:0]) and C output (COUT[7:0]) buses can be swapped by programming the field bit YCOUTSWP in the VPFE

CCD Configuration (CCDCFG) register (0x01C7 0136h). If the YCOUTSWP bit is 0 (default), YOUT[7:0] = Y signal / COUT[7:0] = C

signal . If the YCOUTSWP bit is 1, YOUT[7:0] = C signal / COUT[7:0] = Y signal. For more information, see the TMS320DM36x Video

Processing Front End (VPFE) Reference Guide (literature number SPRUFG8).

(11) To reduce EMI and reflections, depending on the trace length, approximately 22

Ω to 50 Ω damping resistors are recommend on the

following outputs placed near the device: YOUT(0-7),COUT(0-7), HSYNC,VSYNC,LCD_OE,FIELD, and,VCLK. The trace lengths should

be minimized.

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