AM1808AZCED3 datasheet(112/264 Pages) TI

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OFFSET

RecommendedDDR2/mDDR

DeviceOrientation

OFFSET

DDR2/mDDR

Device

AM1808

SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010

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6.11.3.4 Placement

Figure 6-17 shows the required placement for the device as well as the DDR2/mDDR devices. The

dimensions for Figure 6-18 are defined in Table 6-28. The placement does not restrict the side of the PCB

that the devices are mounted on. The ultimate purpose of the placement is to limit the maximum trace

lengths and allow for proper routing space. For single-memory DDR2/mDDR systems, the second

DDR2/mDDR device is omitted from the placement.

Figure 6-18. Device and DDR2/mDDR Device Placement

Table 6-28. Placement Specifications

No.

Parameter

Min

Max

Unit

Notes

1750

Mils

See Notes (1), (2)

1280

Mils

See Notes (1), (2)

Y Offset

650

Mils

See Notes (1). (2), (3)

Clearance from non-DDR2/mDDR signal to DDR2/mDDR Keepout Region

w (4) See Note (5)

(1)

See Figure 6-18 for dimension definitions.

(2)

Measurements from center of device to center of DDR2/mDDR device.

(3)

For single memory systems it is recommended that Y Offset be as small as possible.

(4)

w = PCB trace width as defined in Table 6-27 .

(5)

Non-DDR2/mDDR signals allowed within DDR2/mDDR keepout region provided they are separated from DDR2/mDDR routing layers by

a ground plane.

112

Peripheral Information and Electrical Specifications

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