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AM1808AZCED3 Datasheet(PDF) 249 Page - Texas Instruments |
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AM1808AZCED3 Datasheet(HTML) 249 Page - Texas Instruments |
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249 / 264 page ![]() AM1808 www.ti.com SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010 Table 6-140. Programmable Real-Time Unit Subsystem (PRUSS) Global Memory Map (continued) BYTE ADDRESS REGION 0x01C3 0200 - 0x01C3 1FFF Reserved 0x01C3 2000 - 0x01C3 21FF Data RAM 1 0x01C3 2200 - 0x01C3 3FFF Reserved 0x01C3 4000 - 0x01C3 6FFF INTC Registers 0x01C3 7000 - 0x01C3 73FF PRU0 Control Registers 0x01C3 7400 - 0x01C3 77FF PRU0 Debug Registers 0x01C3 7800 - 0x01C3 7BFF PRU1 Control Registers 0x01C3 7C00 - 0x01C3 7FFF PRU1 Debug Registers 0x01C3 8000 - 0x01C3 8FFF PRU0 Instruction RAM 0x01C3 9000 - 0x01C3 BFFF Reserved 0x01C3 C000 - 0x01C3 CFFF PRU1 Instruction RAM 0x01C3 D000 - 0x01C3 FFFF Reserved Each of the PRUs can access the rest of the device memory (including memory mapped peripheral and configuration registers) using the global memory space addresses 6.33.1 PRUSS Register Descriptions Table 6-141. Programmable Real-Time Unit Subsystem (PRUSS) Control / Status Registers PRU0 BYTE ADDRESS PRU1 BYTE ADDRESS ACRONYM REGISTER DESCRIPTION 0x01C3 7000 0x01C3 7800 CONTROL PRU Control Register 0x01C3 7004 0x01C3 7804 STATUS PRU Status Register 0x01C3 7008 0x01C3 7808 WAKEUP PRU Wakeup Enable Register 0x01C3 700C 0x01C3 780C CYCLCNT PRU Cycle Count 0x01C3 7010 0x01C3 7810 STALLCNT PRU Stall Count PRU Constant Table Block Index 0x01C3 7020 0x01C3 7820 CONTABBLKIDX0 Register 0 PRU Constant Table Programmable 0x01C3 7028 0x01C3 7828 CONTABPROPTR0 Pointer Register 0 PRU Constant Table Programmable 0x01C3 702C 0x01C3 782C CONTABPROPTR1 Pointer Register 1 PRU Internal General Purpose 0x01C37400 - 0x01C3747C 0x01C3 7C00 - 0x01C3 7C7C INTGPR0 – INTGPR31 Register 0 (for Debug) PRU Internal General Purpose 0x01C37480 - 0x01C374FC 0x01C3 7C80 - 0x01C3 7CFC INTCTER0 – INTCTER31 Register 0 (for Debug) Table 6-142. Programmable Real-Time Unit Subsystem Interrupt Controller (PRUSS INTC) Registers BYTE ADDRESS ACRONYM REGISTER DESCRIPTION 0x01C3 4000 REVID Revision ID Register 0x01C3 4004 CONTROL Control Register 0x01C3 4010 GLBLEN Global Enable Register 0x01C3 401C GLBLNSTLVL Global Nesting Level Register 0x01C3 4020 STATIDXSET System Interrupt Status Indexed Set Register 0x01C3 4024 STATIDXCLR System Interrupt Status Indexed Clear Register 0x01C3 4028 ENIDXSET System Interrupt Enable Indexed Set Register 0x01C3 402C ENIDXCLR System Interrupt Enable Indexed Clear Register 0x01C3 4034 HSTINTENIDXSET Host Interrupt Enable Indexed Set Register 0x01C3 4038 HSTINTENIDXCLR Host Interrupt Enable Indexed Clear Register 0x01C3 4080 GLBLPRIIDX Global Prioritized Index Register Copyright © 2010, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 249 Submit Documentation Feedback Product Folder Link(s): AM1808 |
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