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LPC1759 Datasheet(PDF) 53 Page - NXP Semiconductors

Part # LPC1759
Description  32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
PDF  64 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1759 Datasheet(HTML) 53 Page - NXP Semiconductors

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LPC1759_58_56_54_52_51_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 26 January 2010
53 of 64
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
12. ADC electrical characteristics
[1]
Conditions: VSSA = 0 V, VDDA = 3.3 V.
[2]
The ADC is monotonic, there are no missing codes.
[3]
The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 21.
[4]
The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See Figure 21.
[5]
The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See Figure 21.
[6]
The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See Figure 21.
[7]
The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
ADC and the ideal transfer curve. See Figure 21.
[8]
See Figure 22.
Fig 20. SPI slave timing (CPHA = 0)
SCK (CPOL = 0)
MOSI
MISO
002aad989
TSPICYC
tSPICLKH
tSPICLKL
tSPIDSU
tSPIDH
tSPIQV
DATA VALID
DATA VALID
tSPIOH
SCK (CPOL = 1)
DATA VALID
DATA VALID
Table 16.
ADC characteristics
VDDA = 2.7 V to 3.6 V; Tamb = −40 °C to +85 °C unless otherwise specified; ADC frequency 13 MHz.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIA
analog input voltage
0
-
VDDA
V
Cia
analog input capacitance
-
-
15
pF
ED
differential linearity error
[1][2][3] -
-
±1
LSB
EL(adj)
integral non-linearity
[1][4] -
-
±3
LSB
EO
offset error
[1][5] -
±2
-
LSB
EG
gain error
[1][6] -
-
0.5
%
ET
absolute error
[1][7] -
-
4
LSB
Rvsi
voltage source interface
resistance
[8] -
-
7.5
k
Ω
fclk(ADC)
ADC clock frequency
-
-
13
MHz
fc(ADC)
ADC conversion frequency
-
-
200
kHz



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