(

)

(

)

(

)

Voutmin

Ontimemin Fsmax Vinmax

Ioutmin RDS2min

RDS1min

Ioutmin RL

RDS2min

=

×

+

-

-

+

2

Iout

pmod

Vout Co

=

×

×

×

f

p

1

2

zmod

RESR Co

=

×

×

×

f

p

2

ea

ps

gm

Vref gm

ESR

C6

c Vout

×

×

×

=

×

×

f

p

(

)

(

)

ESR Co

R4

2 C6

×

=

×

(

)

(

)

Vout Co

C4

Iout R4

×

=

×

TPS54521

SLVS981 – JUNE 2010

www.ti.com

Minimum Output Voltage

Due to the internal design of the TPS54521, there is a minimum output voltage limit for any given input voltage.

The output voltage can never be lower than the internal voltage reference of 0.8 V. Above 0.8 V, the output

voltage may be limited by the minimum controllable on time. The minimum output voltage in this case is given by

Equation 34.

Where:

Voutmin = minimum achievable output voltage

Ontimemin = minimum controllable on-time (135 nsec maximum)

Fsmax = maximum switching frequency including tolerance

Vinmax = maximum input voltage

Ioutmin = minimum load current

RDS1min = minimum high side MOSFET on resistance (57 m

Ω typical)

RDS2min = minimum low side MOSFET on resistance (50 m

Ω typical)

RL = series resistance of output inductor

(34)

Compensation Component Selection

There are several industry techniques used to compensate DC/DC regulators. The method presented here is

easy to calculate and yields high phase margins. For most conditions, the regulator has a phase margin between

60 and 90 degrees. The method presented here ignores the effects of the slope compensation that is internal to

the TPS54521. Since the slope compensation is ignored, the actual crossover frequency is usually lower than the

crossover frequency used in the calculations. Use SwitcherPro software for a more accurate design.

With the low frequency zero from the aluminum electrolytic output capacitor adding phase and by using type III

compensation to give an additional phase boost, a high bandwidth, high phase margin design can be realized.

This design targets a crossover frequency (bandwidth) of 100 kHz.

First, the modulator pole, fpmod, and the ESR zero, fzmod, must be calculated using Equation 35 and

Equation 36. They are at 720 Hz and 3.8 kHz, respectively.

(35)

(36)

Now the compensation components can be calculated. First, calculate the value for C6 for a crossover frequency

of 100 kHz. Using Equation 37, the nearest standard value for C6 is 680 pF. In order to compensate for the

reduced bandwidth due to the internal slope compensation, the next lowest standard value of 560 pF is actually

used for C6.

(37)

Along with C6, R4 creates a pole to cancel the gain caused by the ESR zero of the power stage, fzmod. To keep

some of the phase from the zero, this pole is placed at roughly twice the frequency of the zero. The value of R4

needed to set the pole at the desired frequency is given by Equation 38.

(38)

Next calculate the value of C4. Together with R4, C4 places a compensation zero at the modulator pole

frequency, fpmod. Use Equation 39 to determine the value of C4.

(39)

Using Equation 38 and Equation 39, the standard values for R4 and C4 are 38.3 k

Ω and 5600 pF.

26

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